Upi Semiconductor Corporation

Hiroki Arai

Nobuyoshi Matsuura

Masashi Koyano

Masamichi Yanagida

The present invention provides a semiconductor device that can achieve miniaturization or thinning of the size of the package while maintaining the characteristic of the MOSFET and reducing the on-resistance value, and a portable apparatus using the same. The gate electrodesandof the semiconductor chipare disposed in the vicinity of the two side surfaces of the longitudinal direction (the x axis direction on the page) of the package, and the gate terminalandthat is mounted with the gate electrodesandin a flip-chip manner are extended in the longitudinal direction of the packageand are derived to the outside from the two side surfacesA andB. Based on the configuration, it is capable of maximizing the size of the semiconductor chip with respect to the size of the package, and it is able to realize the high performance of the element characteristic for the module.

Growing community of inventors

Gunma-ken, Japan

Hiroki Arai