Fujitsu Corporation

Nec Corporation

Hiroichi Nara

Shuji Kimura

Jinichi Yoshizawa

Akira Maruyama

Junichi Tamura

Shoji Suzuki

Shigeki Yamada

Masao Hayashi

Hiroaki Shirai

Kazunori Hanaeda

Yasuhiko Sasaki

A data transfer system includes a plurality of functional blocks each provided with a function module for controlling data transfer between memories of the plurality of functional blocks, by being connected to a function module of other functional blocks via n sets of data signal lines and clock signal lines so that the data transfer proceeds in a synchronized manner. Each of the n sets of data signal lines and clock signal lines is appropriately combined with one another depending on a required condition for communicating with destination functional blocks, such that a plurality of sets of data signal lines and clock signal lines are used for parallel transfer and a single set of a data signal line and a clock signal line is used for serial transfer.

Combining plural data lines and clock lines into set of parallel lines

Disclosed is a method of sending and receiving setting information and monitoring information between a monitoring controller and units which construct the multiplexing section of a communication apparatus. In a case where setting information is transferred from the monitoring controller to a prescribed unit, the monitoring controller time-division multiplexes the setting information for the unit and enters the information into a time switch via an incoming line. The time switch switches the time slot position of the setting information and sends the setting information to an outgoing line corresponding to the unit. The unit drops the setting information from the time slot. Further, in a case where monitoring information is transferred from a unit to the monitoring controller, the unit time-division multiplexes the monitoring information to a predetermined time slot and enters the monitoring information into the time switch from a prescribed line. The time switch switches the time slot position of the monitoring information and sends the monitoring information to the monitoring controller via an outgoing line. The monitoring controller accepts the monitoring information from the unit, with the information coming from the above-mentioned time slot.

Method of sending and receiving setting information and monitoring

A data replacing unit replaces a data packet among a plurality of predetermined data packets in the data replacement manner, which manner is provided by a first control unit as is necessary. An initializing unit generates initializing data using a high-speed clock, clock speed of which is higher than that used by the first control unit, the initializing data being used for initializing the data replacing unit so as to refresh the replacing unit before the data replacement operation is started. A selecting unit, initially and until the initialization is completed, selects data so that the initializing data is provided to the data replacing unit but the control data is not provided thereto.

Data replacement system using high-speed clock for initialization

A control information backup system includes a control unit which is driven by a first power unit and includes a memory for storing software control information which is used during a software operation of the control unit, and a plurality of independent units which are coupled to the control unit and are controlled by the control unit. The independent units are driven by respective second power units which are different from the first power unit and include a memory. The control unit includes a processor for storing the software control information in the memory of arbitrary ones of the independent units, and for reading out the software control information from the memory when making a recovery process after a failure of the first power unit.

Control information backup system

A digital signal transmission system having monitor equipment including a serial/parallel (S/P) converter and a parallel/serial (P/S) converter both. The S/P converter is checked by the aid of a first monitor signal generating circuit that parallel distributes a pass pattern signal given at the input side of the S/P converter to respective individual channel lines for achieving a pass pattern check. The P/S converter is checked with the aid of a second monitor signal generating circuit that receives respective pass pattern signals given, at the input side of the P/S converter, to a multiplexed channel line sequentially at every frame to achieve a pass pattern check.

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Kawasaki, Japan

Hiroichi Nara