Fujitsu Corporation

Hiroichi Kuwahara

Kazuyuki Iida

Kiyoyuki Yoshida

A semiconductor circuit element device with an arrangement for testing the device including a plurality of first logic circuits provided in correspondence with internal line groups which are formed by grouping the internal lines into a plurality of groups, a plurality of internal lines belonging to a group in question constituting the input lines of the plurality of first logic circuits, for outputting an active output signal when all of the inputs represent active signals and outputting an inactive output signal when at least one of the inputs represents an inactive signal; and a second logic circuit constituted by one or more stages of circuit structures, for receiving the outputs of the first logic circuits and sending out an output signal such that the output signal in the case where all of the inputs are inactive output signals is different from the output signal in the case where at least one of the inputs is an active output signal.

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Kawasaki, Japan

Hiroichi Kuwahara