Ricoh Company, Ltd.

Hirohisa Abe

Masahiro Matsuo

Hiroaki Nakanishi

Kunio Matsudaira

Minoru Fukuda

Kohji Yoshii

Hideki Agari

Cheng Hong

Kiyohito Hara

Yoichi Sakai

A semiconductor apparatus includes an input terminal to which an input voltage is applied; an output terminal at which an output voltage is obtained; a power supply circuit unit configured to generate the output voltage from the input voltage, the output voltage having a value corresponding to a duty cycle of a voltage setting signal that is externally applied to the semiconductor apparatus; and a determination circuit unit determining whether the voltage setting signal has a predetermined signal level for the duration of a first predetermined time or longer. The determination circuit unit activates the power supply circuit unit when the voltage setting signal does not have the predetermined signal level for the duration of the first predetermined time or longer. The power supply circuit unit is deactivated when the voltage setting signal has the predetermined signal level for the duration of the first predetermined time or longer.

Semiconductor apparatus and method of controlling operation thereof

A switching regulator converts an input voltage into an output voltage, wherein an operation of the switching regulator is stopped by an enable signal in a standby status. The switching regulator includes a switching transistor performing switching in accordance with a control signal; an inductor that is charged with the input voltage by the switching transistor; a rectifying transistor including a bipolar transistor discharging the inductor when the switching transistor is turned off; a control circuit unit controlling the switching transistor such that a voltage proportional to the output voltage becomes equal to a reference voltage; and a rectifying transistor control circuit unit turning off the rectifying transistor in a cut-off state upon reception of the enable signal indicating the standby status or connecting a base and a collector of the rectifying transistor upon reception of the enable signal indicating a normal operation so that a diode is formed.

Switching regulator

A switching regulator is disclosed. In the switching regulator, when a power source voltage is lowered to a first predetermined value due to an overcurrent, a voltage boost operation is temporarily stopped, and a delay timer of a delay circuit is not reset. When the overcurrent is detected again due to a rise of the power source voltage after temporarily stopping the voltage boost operation, the delay timer of the delay circuit continues to count the delay period. The voltage boost operation is completely stopped by receiving a signal output from the delay circuit when the delay timer completes the counting after passing a predetermined delay period.

Switching regulator and operations control method thereof

A multi-output power supply device of low noise is disclosed that converts a first input voltage to plural different voltages. The multi-output power supply device includes a first power supply circuit for generating a constant voltage from the first input voltage, and outputs the constant voltage through a first output terminal; and one or more second power supply circuits each including a charge pump circuit for generating a constant voltage from the output voltage from the first power supply circuit. Each of the second power supply circuits changes a period of a charging and discharging cycle for charging and discharging a flying capacitor according to an electric current output from the second output terminal.

Multi-output power supply device having charge pump circuit

The present invention is related to a composite flash memory device comprises a plural sector flash memory array which is divided to plural sector that is a minimum erasing unit of the flash memory device, a flash memory array storing control commands which control a total system of the composite flash memory device and/or the only composite flash memory device in and sharing I/O line of the plural sector flash memory array, the read operation of the flash memory array is enable when the plural sector flash memory array is gained access.

Memory configuration of a composite memory device

A switching regulator and a semiconductor device having the same are disclosed, the switching regulator being capable of preventing turn-ON of a switching transistor when the connection between a control circuit controlling the operation of the switching transistor and ground potential is cut off. The switching regulator includes, for example, an NMOS transistor that is turned OFF to decrease the gate voltage of the switching transistor to turn off the switching transistor to be electrically non-conducting when the connection between a first ground terminal and ground potential is cut off by, for example, the disconnection between the first ground terminal and the ground line of the printed circuit board.

Switching regulator and semiconductor device having the same

A differential amplifying apparatus includes first and second differential transistor pairs of different polarities operated by different constant currents, and first to sixth current mirror circuits. The second, third, fifth, and sixth current mirror circuits are connected to an output terminal. The first, second, and sixth current mirror circuits receive a first power supply voltage, and the third, fourth, and fifth current mirror circuits receive a second power supply voltage. The first and second current mirror circuits respectively output mirror currents based on respective corresponding currents flowing through the first differential transistor pair. The third current mirror circuit outputs a current input from the first current mirror circuit. The fourth and fifth current mirror circuits respectively output mirror currents based on respective corresponding currents flowing through the second differential transistor pair. The sixth current mirror circuit outputs a current input from the fourth current mirror circuit.

Differential amplifying method and apparatus operable with a wide range input voltage

A direct current power supply apparatus includes a first power supply circuit and a second power supply circuit. The first power supply circuit converts a source voltage from an externally supplied direct current power source into a first voltage and provides the first voltage to an output terminal. The second power supply circuit converts the source voltage from the externally supplied direct current power source into a second voltage and provides the second voltage to the output terminal. The second power supply circuit is controlled to be turned on and off. The first power supply circuit detects voltage at the output terminal and, when the second voltage is not being provided because the second power supply circuit is inactivated, provides the first voltage.

Power supplying methods and apparatus that provide stable output voltage

An electrically alterable non-volatile memory device is disclosed. In the device architecture of the memory device, control gates are formed, divided corresponding to the blocks and interconnected independently within each block, to further be connected to a metal gate line through block select MOS transistors which are formed on a semiconductor substrate between the blocks. All gate electrodes of the block select MOS transistors which are connected to the control gates interconnected as above within each block are further connected each other. These block select transistors can be controlled by applying erase block signals such as, EBS0, EBS1 and so on, to respective transistors. In addition, the control gates are further connected to a decoder such that some of these control gates may be selected through metal control gate lines. With the block select transistors together with the metal control gate line provided as above, erasing can be achieved in the unit of memory cells which are connected to a metal control gate line within a block.

Growing community of inventors

Osaka, Japan

Hirohisa Abe