Kabushiki Kaisha Toshiba

Hirofumi Igarashi

Masahiko Matsumoto

A semiconductor device comprises a semiconductor substrate, a p-type well formed in the semiconductor substrate, an n-type well formed in the semiconductor substrate and positioned contiguous to the p-type well, an n-type diffused region formed in the p-type well, and a p-type diffused region formed in the n-type well, wherein a corner C having the p-type well on the inside is present in a part of the boundary pattern between the p-type well and the n-type well. At least one of the two sides defining the corner C extends from a top of the corner to the n-well by a predetermined width d over a predetermined length. The particular structure permits suppressing generation of a difference in a well isolation punch-through voltage between the corner and the straight portion of the well boundary of the semiconductor device, making it possible to provide a fine device structure while ensuring a desired well isolation punch-through voltage without relaxing a design rule.

Semiconductor device and method of making the same

A semiconductor device comprises a semiconductor substrate, a p-type well formed in the semiconductor substrate, an n-type well formed in the semiconductor substrate and positioned contiguous to the p-type well, an n-type diffused region formed in the p-type well, and a p-type diffused region formed in the n-type well, wherein a corner C1 having the p-type well on the inside is present in a part of the boundary pattern between the p-type well and the n-type well. At least one of the two sides defining the corner C1 extends from a top of the corner to the n-well by a predetermined width d over a predetermined length. The particular structure permits suppressing generation of a difference in a well isolation punch-through voltage between the corner and the straight portion of the well boundary of the semiconductor device, making it possible to provide a fine device structure while ensuring a desired well isolation punch-through voltage without relaxing a design rule.

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Chigasaki, Japan

Hirofumi Igarashi