Sony Corporation

Hiroaki Yatsuda

Yasuhide Shimizu

Shigemitsu Murayama

Kohei Kudo

An analog to digital converter includes: a reference circuit adapted to generate reference voltages; differential amplifiers; normal phase circuits each of which samples a normal phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a first input terminal of one of the differential amplifiers when the input is differential and single-ended; and reversed phase circuits each of which samples a reversed phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a second input terminal of one of the differential amplifiers when the input is differential and which samples a ground level as a reference voltage of the reference circuit and supplies the reference voltage and comparison voltage to the second input terminal of the differential amplifier when the input is single-ended.

A/D converter

A parallel type analog-to-digital conversion circuit, including a reference signal generating portion and a comparison amplification portion, the comparison amplification portion including a plurality of amplifiers, input resetting switches, first sampling capacitors, second sampling capacitors, first sampling switches, and second sampling switches.

Parallel type analog-to-digital conversion circuit, sampling circuit and comparison amplification circuit

A serial-parallel type analog-to-digital converter includes a reference voltage generator, a higher bit comparing portion and a lower bit comparing portion, and a reference voltage selecting portion, wherein the lower bit comparing portion includes the plurality of comparison stages.

Serial-parallel type analog-to-digital converter and analog-to-digital conversion method

A semiconductor device includes a semiconductor substrate and a ladder resistor formed on the semiconductor substrate. The ladder resistor includes a plurality of elongated resistor portions arranged in parallel with each other, a plurality of connection portions that connect the resistor portions at predetermined intervals in a longitudinal direction of the resistor portions, and a plurality of voltage extraction portions provided in order to extract voltages at the individual connection portions.

Growing community of inventors

Nagasaki, Japan

Hiroaki Yatsuda