Kabushiki Kaisha Toshiba

Other

Hiroaki Tsunoda

Tadashi Iguchi

Yoshiaki Himeno

Masahisa Sonoda

Eiji Sakagami

Takanori Matsumoto

Fumitaka Arai

Katsuya Ito

Kazuhito Narita

Hideyuki Kobayashi

Seiichi Mori

Yasuhiko Matsunaga

Makoto Sakuma

Minori Kajimoto

Hirohisa Iizuka

Hisashi Watanobe

Katsuyasu Shiba

Jota Fukuhara

Ryuichi Kamo

Yuuichiro Murahama

Riichiro Shirota

Yoshio Ozawa

Seiichi Aritome

Katsuyuki Sekine

Kazuhiro Shimizu

Hiroaki Hazama

Susumu Shuto

Kiyomi Naruke

Koichi Matsuno

Hisataka Meguro

Mutsuo Morikado

Hideyuki Kinoshita

Katsuhiro Ishida

Naoki Koido

Tohru Maruyama

Toshiaki Idaka

Kenji Matsuzaki

Hitoshi Araki

Akihito Watanabe

Kunihiro Terasaka

Hidemi Kanetaka

Miwa Tanaka

Yumi Senbokuya

A non-volatile memory of a semiconductor device has a tunnel insulation film provided on the active area; a floating gate electrode provided on the tunnel insulation film; a control gate electrode provided over the floating gate electrode; and an inter-electrode insulation film provided between the floating gate electrode and the control gate electrode, wherein, in a section of the non-volatile memory cell in a channel width direction, a dimension of a top face of the active area in the channel width direction is equal to or less than a dimension of a top face of the tunnel insulation film in the channel width direction, and the dimension of the top face of the tunnel insulation film in the channel width direction is less than a dimension of a bottom face of the floating gate electrode in the channel width direction.

Semiconductor device and method for manufacturing the same

A semiconductor device includes a tunnel insulating film formed on a semiconductor substrate, a floating gate electrode formed on the tunnel insulating film, an inter-electrode insulating film formed on the floating gate electrode, and a control gate electrode formed on the inter-electrode insulating film, wherein the inter-electrode insulating film includes a main insulating film and a plurality of nano-particles in the main insulating film.

Semiconductor device

A semiconductor device comprises a non-volatile memory including a memory cell array, element isolating regions, a second trench and a word line. The memory cell array is constituted by memory cells which have floating electrodes and are arranged in the shape of a matrix on a semiconductor substrate. Each of the element isolating regions has a first trench formed in the semiconductor substrate and between memory cells adjacent to each other along a gate width direction, and an isolating filler filled in the first trench. The second trench is formed in the isolating filler and between the floating electrodes of the memory cells adjacent to each other along the gate width direction, and is narrow at the bottom thereof. The word line is connected to the memory cells, buried in the second trenches and extending along the gate width direction.

Semiconductor memory preventing an electric short circuit between a word line and a semiconductor substrate, and manufacturing method for the semiconductor memory

The present invention relates to methods of fabricating semiconductor devices, including forming a trench in a semiconductor substrate by a reactive ion etching (RIE) method with a reactive product of film stack of a carbon film/silicon oxide film/carbon-containing silicon oxide film, the trench having an inner surface; and removing the reactive product, by treating the trench with diluted hydrofluoric acid to remove the carbon film and the silicon oxide film followed by treating the film by a hydrofluoric acid vapor phase cleaning (HFVPC) method to remove the carbon-containing silicon oxide film.

Method of fabricating semiconductor device

A semiconductor device such as a flash memory includes a semiconductor substrate, two gate insulating films formed on the substrate so as to have a first film thickness and a second film thickness smaller than the first film thickness respectively, and a polycrystalline silicon film formed on the gate insulating films so that parts of the polycrystalline silicon film on the respective gate insulating films are on a level with each other and serving as a gate electrode. The substrate is formed with a recess defined by a bottom and sidewalls substantially perpendicular to the bottom, the recess corresponding to the part of the gate insulating film with the first film thickness.

Semiconductor device and method of fabricating the same

A method of reading out data from nonvolatile semiconductor memory including the steps of applying a first voltage to a bit line contact; applying a second voltage to a source line contact, wherein the second voltage is substantially smaller than the first voltage; applying a third voltage gates of third and fourth select gate transistors, the third voltage configured to bring the third and fourth select gate transistors into conduction; applying a fourth voltage to gates of the plurality of memory cell transistors of a second memory cell unit, the fourth voltage configured to bring the plurality of memory cell transistors of the second memory cell unit into conduction or not, depending on the data that is stored in the memory cell unit; and applying a fifth voltage to gates of the plurality of memory cell transistors of a first memory cell unit, the fifth voltage configured to bring the plurality of memory cell transistors of the first memory cell unit into conduction; wherein the fifth voltage is bigger than the fourth voltage.

Nonvolatile semiconductor memory

A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes element isolation/insulation films buried into a silicon substrate to isolate stripe-shaped element-forming regions. Formed on the substrate area floating gate via a first gate insulating film and further a control gate via a second gate insulating film. Source and drain diffusion layers are formed in self-alignment with control gates. The second gate insulating film on the floating gate is divided and separated together with the floating gate by slits above the element isolation/insulation films into discrete portions of individual memory cells.

Nonvolatile semiconductor memory device and its manufacturing method

A semiconductor device such as a flash memory includes a semiconductor substrate having a surface, and a plurality of trenches formed in the substrate so as to be open at the surface of the substrate, the trenches having opening widths different from each other. The trench with a smaller opening width is formed so as to have a first depth and the trench with a larger opening width has a bottom including opposite ends each of which has a second depth deeper than the first depth and a central portion shallower than the second depth.

Method of fabricating semiconductor device with STI structure

A semiconductor device includes a semiconductor substrate including a memory cell region and a peripheral circuit region, a first trench formed in the memory cell region and having a first depth and a first opening width, and a second trench formed in the peripheral circuit region and including a pair of bottom edge portions and a bottom middle portion located between the bottom edge portions. The second trench has a second opening width that is larger than the first opening width. Each bottom edge portion has a second depth that is larger than the first depth. The bottom middle portion has a third depth that is same as the first depth.

Semiconductor device with STI structure

A non-volatile semiconductor memory device, which is intended to prevent data destruction by movements of electric charges between floating gates and thereby improve the reliability, includes element isolation/insulation films buried into a silicon substrate to isolate stripe-shaped element-forming regions. Formed on the substrate are a floating gate via a first gate insulating film and further a control gate via a second gate insulating film. Source and drain diffusion layers are formed in self-alignment with control gates. The second gate insulating film on the floating gate is divided and separated together with the floating gate by slits above the element isolation/insulation films into discrete portions of individual memory cells.

A nonvolatile semiconductor memory includes memory cell units, each having memory cell transistors aligned in a column direction and capable of writing and erasing electronic data; and contacts on active areas, arranged on both sides of memory cell unit arrays in which the memory cell units are serially connected in the column direction, and the contacts on active areas are shared by the memory cell unit arrays; wherein, the respective memory cell unit arrays are located having a periodical shift length equal to and or more than the integral multiple length of the periodical length of the memory cell units aligned in the column direction so as to be staggered from each other as compared with neighboring memory cell unit arrays aligned in the row direction.

Semiconductor device and method for fabricating the same

Semiconductor device including an element isolation portion having a recess

A method for manufacturing a semiconductor device includes forming a gate-insulating film on a semiconductor substrate; forming a gate electrode on the gate-insulating film to be electrically insulated from the semiconductor substrate; etching the gate electrode, the gate insulating film and the semiconductor substrate to form a trench which is used to electrically isolate a device region for forming a device from the remainder region on the substrate top surface; and etching the inside of the trench using a gas containing Cland HBr with a different condition from the etching condition of the semiconductor substrate.

Semiconductor device and method of manufacturing the same

A method of fabricating a semiconductor device, includes depositing, on a semiconductor substrate, a gate insulating film, a polycrystalline or amorphous silicon film, a silicon nitride film and a silicon oxide film sequentially, patterning a resist for forming a plurality of trenches on an upper surface of the substrate so as to have opening widths differing from each other, etching the silicon oxide film and the silicon nitride film formed on the substrate by an reactive ion etching (RIE) process with the resist serving as a mask, and etching the polycrystalline or amorphous silicon film, the gate insulating film and the substrate by the RIE process with the etched silicon oxide film and silicon nitride film serving as a mask using reactive plasma including a halogen gas, fluorocarbon gas, Ar and O2, thereby simultaneously forming the trenches with opening widths differing from each other.

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Yokkaichi, Japan

Hiroaki Tsunoda