Tohoku University

Foundation for Advancement of International Science

Hiroaki Tanaka

Tadahiro Ohmi

Akinobu Teramoto

Tatsunori Isogai

This invention provides a technique advantageous to improve the operating speed of an integrated circuit. In a semiconductor device in which an n-type transistor and a p-type transistor are formed on the (551) plane of silicon, the thickness of a silicide layer which is in contact with a diffusion region of the n-type transistor is smaller than that of a silicide layer which is in contact with a diffusion region of the p-type transistor.

Semiconductor device

A semiconductor device manufacturing method which achieves a contact of a low resistivity is provided. In a state where a first metal layer in contact with a semiconductor is covered with a second metal layer for preventing oxidation, only the first metal layer is silicided to form a silicide layer with no oxygen mixed therein. As a material of the first metal layer, a metal having a work function difference of a predetermined value from the semiconductor is used. As a material of the second metal layer, a metal which does not react with the first metal layer at an annealing temperature is used.

Growing community of inventors

Sendai, Japan

Hiroaki Tanaka