Elpida Memory, Inc.

Ps4 Luxco S.a.r.l.

Longitude Semiconductor S.a.r.l.

Hiroaki Taketani

Kiyonori Oyu

Koji Hamada

Koji Taniguchi

A semiconductor device may include, but is not limited to, a semiconductor substrate having a first gate groove; a first fin structure underneath the first gate groove; a first diffusion region in the semiconductor substrate, the first diffusion region covering an upper portion of a first side of the first gate groove; and a second diffusion region in the semiconductor substrate. The second diffusion region covers a second side of the first gate groove. The second diffusion region has a bottom which is deeper than a top of the first fin structure.

Semiconductor device and method of forming the same

A semiconductor device includes a semiconductor device may include, but is not limited to, a semiconductor substrate, an isolation electrode, a gate electrode, a gate insulating film, and a first insulating film. The semiconductor substrate has a first groove and a second groove. An isolation electrode is positioned in the first groove. The gate electrode is positioned in the second groove. The gate insulating film is adjacent to the gate electrode. The first insulating film is adjacent to the isolation electrode. The isolation electrode is greater in threshold voltage than the gate electrode.

Semiconductor device

In Trench-Gate Fin-FET, in order that the advantage which is exerted in Fin-FET can be sufficiently taken even if a transistor becomes finer and, at the same time, decreasing of on-current can be suppressed by saving a sufficiently large contact area in the active region, a fin widthof a channel region becomes smaller than a widthof an active region.

Semiconductor device including a Trench-Gate Fin-FET

A semiconductor device may include, but is not limited to: a first insulating film; first and second impurity layers on the first insulating film; a semiconductor layer on the first insulating film; a second insulating film covering the semiconductor layer; a first electrode on the second insulating film over the semiconductor layer; and a second electrode on the second insulating film over the semiconductor layer. The first and second impurity layers have a first conductive type. The first impurity layer is separated from the second impurity layer. The semiconductor layer is positioned between the first and second impurity layers. The semiconductor layer has a second conductive type which is different from the first conductive type. The first electrode is electrically insulated from the second electrode. The second electrode at least partially overlaps the first electrode in plan view.

Semiconductor device and method of controlling the same

A semiconductor device may include a semiconductor substrate, a diffusion layer provided over the semiconductor substrate, source and drain diffusion regions provided in upper regions of the diffusion layer, a gate insulating film provided over the source and drain diffusion regions and the diffusion layer, a gate electrode provided on the gate insulating film and positioned over the diffusion layer, a passivation film provided over the gate insulating film and the gate electrode, an insulating film that covers the passivation film, and contact plugs that penetrate the insulating film, the passivation film, and the gate insulating film, so that the contact plugs reach the source and drain diffusion regions. The contact plugs are positioned near side walls of the gate electrode. Fluorine is implanted to the passivation film. Fluorine is diffused to a silicon-insulator interface between the gate insulating film and the diffusion layer under the gate electrode.

Semiconductor device and method of manufacturing the same

A semiconductor device including a trench-gate MOS transistor on a semiconductor substrate is constituted of a trench formed in an active region, a fin channel region formed between a separation region and the trench in the active region, a first gate electrode embedded in the separation region in connection with the fin channel region via a first gate insulating film, a second gate electrode embedded in the trench in connection with the fin channel region via a second gate insulating film, and a source-drain diffusion region disposed beside the trench in the active region below the second gate electrode.

Growing community of inventors

Tokyo, Japan

Hiroaki Taketani