Sanyo Electric Co., Ltd.

Gifu Sanyo Electronics Co., Ltd.

Hiroaki Saito

Hirotoshi Kubo

Eiichiroh Kuwako

Masanao Kitagawa

Masahito Onda

Tetsuya Okada

Hiroyasu Ishida

Shigeyuki Murai

Kikuo Okada

Tetsuya Yoshida

Shouji Miyahara

Masamichi Yanagida

Junichiro Tojo

Satoshi Iwata

An interlayer dielectric film is completely buried in a trench, and failures caused by step coverage is prevented because a source electrode can be formed substantially uniformly on an upper portion of a gate electrode. Also, in the processes of forming a source region, a body region and an interlayer dielectric film, only one mask is necessary so that the device size is reduced to account for placement error of only one mask alignment.

Insulated gate-type semiconductor device and manufacturing method of the same

A power MOSFET comprises: a semiconductor substrateof a first conduction type; a drain layerof the first conduction type and formed on a surface layer of the substrate; a gate insulating filmformed in a partial region on the drain layer; a gate electrodeformed on the gate insulating film; an insulating filmformed on the gate electrode; a side wall insulatorformed on side walls of the gate insulating film, the gate electrode, and the insulating film; a recess formed on the drain layerand in a region other than a region where the gate electrodeand the side wall insulatorare formed; a channel layerof a second conduction type opposite to the first conduction type and formed in a range from the region where the recess is formed to a vicinity of the region where the gate electrodeis formed; a source region layerof the one conduction type and formed on the channel layeroutside the recess; and a wiring layerformed to cover the channel layerwhich is exposed through the recess, the side wall insulator, and the insulating film.

Semiconductor device and a method of fabricating the same

A capacity layer is formed of non-doped polysilicon. Unlike capacity layers formed of an oxide film, generation of seams and the like can be suppressed and thereby a stable capacity layer can be formed. Moreover, polysilicon used as a capacity layer may be doped polysilicon, and an oxide film formed on the surface of the polysilicon also serves as a capacity film. Thus, provision of an insulated gate device featuring low capacity is made possible.

Insulated gate semiconductor device and manufacturing method of the same

In a conventional semiconductor device, there was a problem that, in a guard ring region, a shape of a depletion layer is distorted and stable withstand voltage characteristics cannot be obtained. In a semiconductor device of the present invention, a thermal oxide film in an actual operation region and a thermal oxide film in a guard ring region are formed in the same process. Thereafter, the thermal oxide film is once removed and is formed again. Thus, a film thickness of the thermal oxide film on the upper surface of the guard ring region is set to, for example, about 8000 to 10000 &#x212b;. Accordingly, a CVD oxide film including moving ions is formed in a position distant from a surface of an epitaxial layer. Consequently, distortion of a depletion layer, which is influenced by the moving ions, is suppressed and desired withstand voltage characteristics can be maintained.

Semiconductor device

A Schottky barrier diode in which a p-type semiconductor layer is provided in an n-type epitaxial layer can realize lowering the forward voltage VF without considering leak current IR. However, when compared with a normal Schottky barrier diode, the forward voltage VF is generally high. When a Schottky metal layer is suitably selected, although the forward voltage VF can be reduced, there is a limit in further reduction. On the other hand, when the resistivity of the n-type semiconductor layer is reduced, although the forward voltage VF can be realized, there is a problem that breakdown voltage is deteriorated. In a semiconductor device of the invention, a second n-type semiconductor layer having a low resistivity is laminated on a first n-type semiconductor layer capable of securing a specified breakdown voltage. P-type semiconductor regions are made to have depths equal to or slightly deeper than the second n-type semiconductor layer. By this, in a Schottky barrier diode in which leak current IR can be suppressed by pinch off of a depletion layer, the forward voltage VF can be reduced and the specified breakdown voltage can be secured.

Schottky barrier diode semiconductor device

The present invention improves the characteristic of a trench-type vertical MOSFET. When a trench serving as a gate is formed, it is made in a shape of &ldquo;&ggr;&rdquo; which is convex toward the inside of the trench. Thus, the surface area of the trench is reduced so that both gate-source capacitance and gate-drain capacitance can be reduced, thereby shortening the switching time of the MOSFET.

Method of fabricating semiconductor device

The present invention improves the characteristic of a trench-type vertical MOSFET. When a trench 23 serving as a gate 25 is formed, it is made in a shape of '.gamma.' which is convex toward the inside of the trench. Thus, the surface area of the trench is reduced so that both gate-source capacitance and gate-drain capacitance can be reduced, thereby shortening the switching time of the MOSFET.

Semiconductor device and method of fabricating the same

A channel layer is formed in a surface of a semiconductor substrate, and a plurality of trenches are formed in the surface of the semiconductor substrate, the trenches being deeper than the channel layer. Then, gate electrodes are formed in the trenches, respectively, after which body layers are formed between the trenches and source layers are formed adjacent to the trenches.

Growing community of inventors

Ota, Japan

Hiroaki Saito