Victor Company of Japan, Limited

Hiroaki Matsumoto

Toyotaka Machida

Tatsuya Shinyagaito

Akira Nakamura

Shigeharu Ueguri

Disclosed is a synchronizer for establishing synchronism between horizontal and vertical sync pulses of a non-interlaced video signal and those of an interlaced video signal, the number of non-interlaced scan lines being smaller by 2n-1 than the interlaced scan lines, where n is an integer equal to or greater than unity. Two variable frequency clocks are generated, one having a higher frequency variable as a function of a phase difference between the horizontal sync pulses of the two video signals and the other having one half the higher frequency. A first period is defined which runs from a non-interlaced horizontal sync of first occurrence in a given field to a horizontal sync of (n-1)th occurrence in the given field and a second period is defined that runs from the non-interlaced horizontal sync of first occurrence in a subsequent field to a horizontal sync of n-th occurrence in the subsequent field. The higher frequency clock is normally used to generate the non-interlaced horizontal and vertical sync and the lower frequency clock is used instead when vertical sync pulses of the two video signals are mismatched in phase and during the first and second periods to compensate for the difference in scan line number.

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Mitsukaido, Japan

Hiroaki Matsumoto