Mitsubishi Electric Corporation

Hiroaki Maehara

Kazuya Yamamoto

Koji Yamanaka

Miyo Miyashita

Shohei Imai

Ko Kanaya

Kazuhiro Iyomasa

Shintaro Watanabe

Hiroshi Otsuka

Akira Ohta

Hideaki Katayama

Tetsuo Kunii

Akira Ota

Ayumi Fuchida

Eigo Kuwata

Naoki Kosaka

Jun Takaso

Motoyoshi Koyanagi

There is provided a configuration which includes: a burying layer which has a current narrowing window where portions protruding onto a top part of a ridge stripe are opposed to each other with an interval therebetween narrower than a width of the top part; and a diffraction grating in which a λ/4 phase shifter is placed at an intermediate portion in a light traveling direction; wherein a sectional shape of the current narrowing window varies depending on a position in the light traveling direction so that, at a region where the λ/4 phase shifter is placed, a resistance of a current path from a second cladding layer to a first cladding layer through the current narrowing window is minimum.

Optical semiconductor device and method of manufacturing optical semiconductor device

A field-effect transistor with protection diodes includes: a field-effect transistor; and a two-terminal electrostatic protection circuit connected between a gate and a source of the field-effect transistor, wherein the two-terminal electrostatic protection circuit comprises: a first diode that is positioned on a reverse-biased side when a voltage lower than a potential of the source is applied to the gate and has a reverse withstand voltage lower than a reverse withstand voltage between the gate and the source of the field-effect transistor; a second diode that is positioned on a forward-biased side when a voltage lower than a potential of the source is applied to the gate and is connected in anti-series to the first diode; and a resistor that is connected in series to a diode pair comprising the first diode and the second diode and formed using a same channel layer as that of the field-effect transistor.

Field-effect transistor with protection diodes

A semiconductor device is provided with one or more gate fingers () that are provided in an active region on a semiconductor substrate (), and a source finger () and a drain finger () that are provided in the active region and arranged alternately to allow each gate finger to be sandwiched between the source and drain fingers. The semiconductor device includes terminal circuit () that has inductive impedance at the frequency of a signal input to an input terminal of the one or more gate fingers, and is directly or indirectly connected to the one or more gate fingers at an area being spaced away from a connecting position of the input terminal () of the one or more gate fingers ().

Semiconductor device

A package includes a conductor base plate having a element fixed to an upper surface thereof, a side wall provided on the conductor base plate to surround the element, the side wall having a conductor portion electrically connected to the conductor base plate, a dielectric cap disposed on the side wall, a front-side metal film provided on an outer surface of the dielectric cap, a first back-side metal film provided on an inner surface of the dielectric cap such that a center of the first back-side metal film approximately coincides with a center of a surface of the dielectric cap which faces the conductor base plate, and a plurality of vias passing through the dielectric cap to achieve electrical connection between the front-side metal film and the first back-side metal film and between the front-side metal film and the conductor portion oldie side wall.

Microwave and millimeter wave package

A multi-finger transistor includes a circuit suppressing a variation in voltage current distribution. The circuit connects gate fingers () to each other, or source fingers () to each other in a region which is located outside an active region () and on a side where a drain pad () is disposed. The multi-finger transistor is configured to be linearly symmetric with respect to a direction of propagation of a signal from a gate pad () at the position of the gate pad ().

Multi-finger transistor and semiconductor device

In the present invention, in addition to arranging a plurality of amplifying elements in a staggered manner, signal path lengths from an input-side divider to gate pads of the plurality of amplifying elements are equalized, and signal path lengths from drain pads of the plurality of amplifying elements to an output-side combiner are equalized.

Amplifier

A configuration is provided with: a tuned linethat is connected between a branch terminaland a branch terminal of branch linesand; and a tuned linethat is connected between a combining terminaland a combining terminalof combining linesand. This enables reduction of a non-uniform voltage distribution occurring due to a difference in characteristics between two amplifier elementsand

High-frequency power amplifier

A high frequency power amplifier includes: a first transistor for amplifying an input high-frequency signal; a second transistor for amplifying an output signal of the first transistor; a third transistor connected in parallel with the first transistor and for amplifying the input high-frequency signal; a first switching element connected between an output of the first transistor and an input of the second transistor; a second switching element connected between an output of the third transistor and the first switching element; third and fourth switching elements connected in series between the output of the first transistor and an output of the second transistor, and between the second switching element and the output of the second transistor; and a first capacitor connected between the third switching element and the fourth switching element.

Growing community of inventors

Tokyo, Japan

Hiroaki Maehara