Hitachi, Ltd.

Renesas Technology Corp.

Other

Hitachi Vlsi Engineering Corp.

Hitachi Ulsi Engineering Corp.

Solid State Storage Solutions LLC

Hitachi Ulsi Systems Co., Ltd.

Iwatani Corporation

S4, Inc.

Hiroaki Kotani

Hitoshi Miwa

Atsushi Nozoe

Shoji Kubono

Takayuki Kawahara

Katsutaka Kimura

Hiroshi Sato

Keiichi Yoshida

Satoshi Noda

Kazuyoshi Oshima

Yasuhiro Kasama

Michitaro Kanamitsu

Tetsuya Tsujikawa

Toshinori Harada

Takayuki Yoshitake

Kazuhiko Kajigaya

Shinji Udo

Takashi Yamazaki

Tetsu Udagawa

Toshihiro Tanaka

Hitoshi Kume

Toshio Sasaki

Masataka Kato

Kazunori Furusawa

A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.

Clock synchronized non-volatile memory device

An igniter can include a safety mechanism which is easily operated by an adult but is difficult for a child to release. In particular, an igniter can include: a nozzle section which emits a flame; a fuel introduction section; an ignition section which ignites the introduced fuel, wherein the ignition section is configured in such a manner that the fuel is ignited by movement of an ignition operating section to an ignition position; a movement restricting section having restricting sections which restrict the movement of the ignition operating section; and a permitting section which permits movement. When moving the movement restricting section, either the restricting sections or the permitting section can be disposed so as to correspond to the direction of movement of the ignition operating section.

Igniter

Multi-bits storage memory

Clock synchronized nonvolatile memory device

A nonvolatile memory apparatus including a control circuit, plural terminals including clock, command and other terminals, a clock generator, and plural nonvolatile memory cells. The clock and command terminals respectively receive a first clock signal and commands including read and program commands. The clock generator generates a second clock signal. In response to the read command, the control circuit controls reading data from the memory cells, and outputting data via the other terminal not the command terminal in response to the first clock signal. In response to the program command, the control circuit controls receiving data via the other terminal not the command terminal in response to the first clock signal, and writing data to the memory cells. The data writing to ones of said nonvolatile memory cells is performed using the second clock signal.

A nonvolatile memory apparatus which includes a control circuit, plural terminals including a clock, command and other terminals, a converter circuit, and plural of nonvolatile memory cells. The clock terminal receives a clock signal, the command terminal receives commands including a read and program commands, and the control circuit reads out operation steps from a program memory to be executed to control an operation of the received command. In an operation in response to the read command, the control circuit controls reading data in parallel from ones of the nonvolatile memory cells, converting parallel type data to serial type data by the converter circuit, and serially outputting data via the other terminal except the command terminal in response to the clock signal. In an operation in response to the program, the control circuit controls serially receiving data via the other terminal except the command terminal in response to the clock signal, converting serial type data to parallel type data by the converter circuit, and writing data in parallel to ones of the nonvolatile memory cells.

A nonvolatile memory apparatus including a control circuit, plural terminals including clock, command and other terminals, a clock generator, and plural nonvolatile memory cells. The clock and command terminals respectively receives a first clock signal and commands including read and program commands. The clock generator generates a second clock signal. In response to the read command, the control circuit controls reading data from the memory cells, and outputting data via the other terminal not the command terminal in response to the first clock signal. In response to the program command, the control circuit controls receiving data via the other terminal not the command terminal in response to the first clock signal, and writing data to the memory cells. The data writing to ones of said nonvolatile memory cells is performed using the second clock signal.

A nonvolatile memory apparatus including plural terminals having clock, command and other terminals, a clock generator, and plural nonvolatile memory cells. The clock and command terminals respectively receive a first clock signal and commands having read and program commands. The clock generator generates a second clock signal. In response to the read command, the apparatus reads data from the memory cells, and outputs data to outside of the apparatus in response to the first clock signal via the other terminal except the command terminal. In response to the program command, the apparatus receives data from outside of the apparatus in response to the first clock signal via the other terminal except the command terminal and writes data to the memory cells. The data writing to the memory cells is performed using the second clock signal.

A nonvolatile memory apparatus which includes a plurality of terminals including a clock terminal, a command terminal and an other terminal, a control circuit, and a plurality of nonvolatile memory cells. The clock and command terminals are capable of correspondingly receiving a clock signal and commands which include read and program commands. In an operation in response to the read command, the control circuit reads data from ones of the nonvolatile memory cells, and outputs data via said the other terminal based on the clock signal and in response to the program command, the control circuit is capable of receiving data via the other terminal based on the clock signal and writes data to ones of the nonvolatile memory cells.

A nonvolatile memory apparatus including plural terminals including a first terminal, a second terminal and other terminal, and a nonvolatile memory array including plural nonvolatile memory cells. The first terminal receives a clock signal and the second terminal receives information for specifying an arbitrary one of the read and program operations. Each memory cell stores multi-bit type data having more than two bits. In the read operation, the apparatus reads multi-bit type data from the memory cells, converts multi-bit type data to binary type data, and outputs binary type data to outside via the other terminal not the command terminal in response to the clock signal. In the program operation, the apparatus receives binary type data from outside via the other terminal except the command terminal in response to the clock signal, converts binary type data to multi-bit type data, and writes multi-bit type data to the memory cells.

Growing community of inventors

Ome, Japan

Hiroaki Kotani