Oracle International Corporation

Oracle America, Inc.

Kotura, Inc.

Hiren D Thacker

Ashok V Krishnamoorthy

John E Cunningham

Xuezhe Zheng

Ivan Shubin

Ronald Ho

Robert David Hopkins, Ii

Jing Shi

Jon Lexau

Chaoqi Zhang

Guoliang Li

Kannan Raj

Shiyun Lin

Jin Yao

Stevan S Djordjevic

Mehdi Asghari

Dazeng Feng

Frankie Liu

Roshanak Shafiiha

Gary L Gilbert

Daniel C Lee

Jeffrey W Denq

Jingqiong Xie

Hyung Suk Yang

The disclosed embodiments provide an apparatus for connecting one or more optical fibers to an optoelectronic system. This apparatus includes a packaged optoelectronic module (POeM) comprising an optical connector, a silicon photonic (SiP) chip, an integrated circuit (IC) chip, at least one laser chip and a package substrate. The apparatus also includes an assembly adapter enclosing the POeM, wherein the assembly adapter includes a mechanical transfer (MT) ferrule cavity, which includes one or more coarse-alignment structures to guide an MT ferrule enclosing at least one optical fiber during assembly of the apparatus. The assembly adapter is comprised of a solder-reflow-compatible material to facilitate bonding the assembly adapter to a circuit board.

Reflow-compatible optical I/O assembly adapter

The disclosed embodiments relate to a system for assembling an optical connector. During the assembly process, the system first fabricates the optical connector, wherein the optical connector is precut and includes a fiber coupler for connecting to an external optical fiber. Next, the system bonds the optical connector to a photonic chip, wherein the photonic chip includes an optical coupler, which is coupled to one or more optical components within the photonic chip. Finally, after the optical connector is bonded to the photonic chip, the system uses a laser to write a coupling waveguide in the optical connector, wherein the coupling waveguide is routed through the optical connector to connect the optical coupler in the photonic chip with the fiber coupler for connecting to the external optical fiber.

Waveguide-last silicon photonic optical connector assembly

An optical receiver includes: an active transimpedance amplifier (TIA) that converts a photocurrent from a photosensor into an active voltage signal; a high-speed amplifier that amplifies the active voltage signal to produce an amplified voltage signal that comprises an output for the optical receiver; and a reference-voltage-generation circuit that generates a reference voltage for the high-speed amplifier. This reference-voltage-generation circuit includes a dummy TIA that is identical to the active TIA, but does not receive a live input signal, and produces a dummy voltage signal. It also includes a low-speed amplifier which includes: an active input that receives the active voltage signal from the active TIA output; a dummy input that receives the dummy voltage signal from the dummy TIA output; and an output that controls directly or indirectly the reference voltage for the high-speed amplifier. In the direct control case, the output of low-speed amplifier includes a feedback connection that feeds back into the dummy input. In the indirect control case, the output of low-speed amplifier adjusts the reference voltage for the high-speed amplifier through dummy TIA internal biasing.

Extracting an embedded DC signal to provide a reference voltage for an optical receiver

A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits that modulate data, communicate data, and serialize/deserialize data, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and a top surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit. Furthermore, a bottom surface of the optical integrated circuit faces the top surface of the interposer, and the front surface of the optical integrated circuit is optically coupled to an optical-fiber receptacle, which in turn is optically coupled to an optical-fiber connector.

Packaged opto-electronic module

An integrated optical device includes an electro-absorption modulator disposed on a top surface of an optical waveguide. The electro-absorption modulator includes germanium disposed in a cavity between an n-type doped silicon sidewall and a p-type doped silicon sidewall. By applying a voltage between the n-type doped silicon sidewall and the p-type doped silicon sidewall, an electric field can be generated in a plane of the optical waveguide, but perpendicular to a propagation direction of the optical signal. This electric field shifts a band gap of the germanium, thereby modulating the optical signal.

Integrated electro-absorption modulator

A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are proximate to each other in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a top surface of an interposer, and this top surface is in turn electrically coupled to a front surface of an input/output (I/O) integrated circuit that faces the top surface. Furthermore, the front surface of the I/O integrated circuit is electrically coupled to a top surface of the optical integrated circuit, where the top surface of the optical integrated circuit faces the front surface of the I/O integrated circuit.

Hybrid-integrated photonic chip package with an interposer

A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each other on the same side of a substrate in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. In addition, an input/output (I/O) integrated circuit is coupled to the optical integrated circuit between the substrate and the optical integrated circuit. This I/O integrated circuit includes high-speed I/O circuits and energy-efficient driver and receiver circuits and communicates with optical devices on the optical integrated circuit. By integrating the optical integrated circuit, the integrated circuit and the I/O integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.

Hybrid integrated photonic chip package

A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit by a top surface of the interposer, where the top surface faces the front surface of the integrated circuit and the front surface of the optical integrated circuit. Furthermore, the integrated circuit and the optical integrated circuit may be on a same side of the interposer. By integrating the optical integrated circuit and the integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.

A system includes optical modules. Each module includes a different base and one or more module waveguides on the base. Module waveguides from different modules are aligned such that the aligned module waveguides exchange light signals. At least a portion of one of the aligned module waveguides is between the base of one of the modules and the base of another module. First electronics operate a transmitter on a first one of the optical modules so as to generate one of the light signals. Second electronics operate a receiver on a second one of the modules such that the electronics generate an electrical signal in response to the receiver receiving one of the light signals.

Edge coupling of optical devices

During a fabrication technique, trenches are defined partially through the thickness of a substrate. Then, photonic integrated circuits are coupled to the substrate. These photonic integrated circuits may be in a diving-board configuration, so that they at least partially overlap the trenches. While this may preclude the use of existing dicing techniques, individual hybrid integrated photonic chips (which each include a portion of the substrate and at least one of the photonic integrated circuits) may be singulated from the substrate by: coupling a carrier to a front surface of the substrate; thinning the substrate from a back surface until the partial trenches are reached (for example, by grinding the substrate); attaching a support mechanism (such as tape) to the back surface of the substrate; removing the carrier; and then removing the support mechanism.

Method for singulating hybrid integrated photonic chips

This chip package includes a substrate having a multilayer electroplated stack disposed on a surface of the substrate. The multilayer electroplated stack may include one or more instances of alternating layers of gold and tin, where relative thicknesses of the alternating layers, when melted, result in a chemical composition having an initial melting temperature to form a bump and a subsequent melting temperature to reflow the bump that is higher than the initial melting temperature. For example, the chemical composition may correspond to a non-equilibrium gold-tin alloy.

Electroplated solder for high-temperature interconnect

A chip package is described which includes a first chip having a first surface and first sides having a first side-wall angle, and a second chip having a second surface and second sides having a second side-wall angle, which faces and is mechanically coupled to the first chip. The chip package is fabricated using a batch process, and the chips in the chip package were singulated from their respective wafers after the chip package is assembled. This is accomplished by etching the first and second side-wall angles and thinning the wafer thicknesses prior to assembling the chip package. For example, the first and/or the second side walls can be fabricated using wet etching or dry etching. Therefore, the first and/or the second side-wall angles may be other than vertical or approximately vertical.

Batch process for three-dimensional integration

An interconnect module for communicating electrical signals and optical signals is described. In particular, an integrated circuit in the interconnect module receives and transmits the electrical signals with other components in a system that includes the interconnect module via an electrical connector. In addition, the integrated circuit receives and transmits electrical signals to a hybrid silicon-photonic bridge chip that performs electrical-to-optical and optical-to-electrical conversion. In turn, this bridge chip receives and transmits optical signals via an optical fiber. The interconnect module can be remateably connected to a backplane in the system, and can be arranged in a stacked configuration with other instances of the interconnect module. In these ways, the interconnect module facilitates dense, modular or scalable, and compact electrical and optical communication in the system.

Stackable photonic interconnect module

A chip package is described. This chip package includes a substrate having a side at an angle relative to the top and bottom surfaces of the substrate that is between that of a direction parallel to the top and bottom surfaces and that of a direction perpendicular to the top and bottom surfaces (i.e., between 0&#xb0; and 90&#xb0;). This side may be configured to couple to a stack of semiconductor dies in which the semiconductor dies are offset from each other in a direction parallel to the top and bottom surfaces so that one side of the stack defines a stepped terrace. For example, the side may include electrical pads. These electrical pads may be coupled to electrical pads on the top surface by through-substrate vias (TSVs) in the substrate. Moreover, the electrical pads on the top surface may be configured to couple to an integrated circuit.

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San Diego, CA, United States of America

Hiren D Thacker