Other

Navosha Corporation

Juniper Networks, Inc.

Hirak Mitra

Michael R Moon

Richard Wicks

Raj Kulkarni

Donald C Lewis

Karen Ann Reinhardt

David Stark

A container holds an absorbent pad which contains fluids for cleansing toilet facilities before using them, or for cleansing or moisturizing a person's body after using a toilet. One carries one or more such containers on one's person. To use the container one opens it and expresses fluid from the pad onto dry clean toilet paper by pressing that toilet paper onto the pad. One then uses the now moist toilet paper to clean a toilet seat, or to clean or moisturize one's person or the person of another. Then one disposes of the now used toilet paper as one normally disposes of toilet paper.

Devices and methods to maintain personal hygiene while using the toilet

The present disclosure provides a means to build a solar cell that is transparent to and polarizes visible light, and to transfer the energy thus generated to electrical power wires.

Method to build transparent polarizing solar cell

In an embodiment, the present invention discloses a flexible and reconfigurable architecture with efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the output of a first functional component is stored to an input memory of a next functional component. Thus when the first functional component completes its processing, its output is ready to be accessed as input to the next functional component. In an embodiment, the memory device further comprises a partition mechanism for simultaneously accepting output writing from the first functional component and accepting input reading from the second functional component. In another embodiment, the present integrated circuit comprises at least two functional components and at least two memory devices, together with a controller for switching the connections between the functional components and the memory devices. The controller can comprise a multiplexer or a switching matrix.

Chained operation of functional units in integrated circuit by writing DONE/complete value and by reading as GO/start value from same memory location

The present disclosure provides a methodology for reducing congestion of a processing unit, preferably by configuring a plurality of functional blocks to run in parallel or in series without the influence or input from the processing unit. In an embodiment, the present method chains a plurality of functional blocks together by software so that one functional block starts after the completion of another functional block. The configuration of the chain can be series, parallel, and any combination thereof, arranged to meet the circuit's objective. The chaining can be configured and re-configured, preferably by software input. The chaining can also be performed at design time or at run time. The chaining can also be modified, preferably at design time, but can also be modified at run time.

Linking functional blocks for sequential operation by DONE and GO components of respective blocks pointing to same memory location to store completion indicator read as start indicator

The present disclosure provides an architecture that enables massive parallel processing on an IC while alleviating control congestion, memory access congestion and wiring congestion, together with high flexibility where the processing units are soft-arranged to perform different tasks. In an embodiment, the present architecture includes a functional block with a GO component to start the functional block, and a DONE component to identifying the completion status. The GO and DONE components can be linked together, preferably by a linkage component, to chain the functional blocks. The linkage is preferably soft configurable. In another embodiment, the present architecture includes an integrated circuit comprises a plurality of functional blocks chained together for serial processing, parallel processing, or any combination thereof.

Chained operation of functional components with DONE and GO registers storing memory address for writing and reading linking signal value

The present invention relates to a flexible and reconfigurable bus fabric for microelectronic processing units, which can offer efficient memory data management, together with efficient data transfer and relieving data transfer congestion in an integrated circuit. In an embodiment, the present reconfigurable bus fabric comprises a multistate intersection between two data buses. Preferably, the multistate intersection comprises at least two states, a connecting state connecting the two data buses, and a disconnecting state disconnecting the two data buses. The multistate intersection provides a reconfigurable bus fabric, allowing different connection configuration for the data buses. This reconfigurable bus fabric offers soft-configurability and soft-reconfigurability, using software programming to arrange the circuits' interconnections. Other configurations are also disclosed in exemplary embodiments.

System and methods for connecting multiple functional components

SYNC parsing for Cable Modem Clock Synchronization is implemented using software processing with hardware assist in a manner that achieves the cost benefits of software SYNC parsing with the time accuracy of hardware SYNC parsing. Hardware scans for the arrival of new MPEG frames. Whenever any MPEG frame arrives, the MPEG frame is processed to extract MAC packets. If a SYNC packet is discovered during this processing, the software determines the SYNC arrival time, a comparison is made between the time the SYNC arrival time and the SYNC time value, and the software uses the difference to adjust the Cable Modem clock. Implementation variations include different approaches to when timestamps are recorded, the calculation of the SYNC arrival time, the use of software to process the MPEG frame and MAC packets, and the use of software to perform the time comparison.

Growing community of inventors

Sunnyvale, CA, United States of America

Hirak Mitra