Xilinx, Inc.

Hing Yee Angela Wong

Yan E Wang

Nui Chong

Qi Lin

Yuhao Luo

Hong-Tsz Pan

Xin X Wu

Yuezhen Fan

Bang-Thu Nguyen

Jonathan Jung-Ching Ho

Method and apparatus for compensating an integrated circuit design for mechanical stress effects. One aspect of the invention relates to designing an integrated circuit. Layout data is obtained that describes layers of the integrated circuit. At least one of the layers is analyzed to detect at least one structure susceptible to damage from mechanical stress. A bias is automatically added to each of the at least one structure to reduce mechanical stress of the at least one structure as fabricated. Augmented layout data is then provided for the integrated circuit.

Method and apparatus for compensating an integrated circuit layout for mechanical stress effects

Growing community of inventors

San Jose, CA, United States of America

Hing Yee Angela Wong