Takeda Riken Kogyo Kabushiki Kaisha

Hikaru Furukawa

Masakazu Mitamura

Kenji Higuchi

Disclosed is an A-D converter in which a voltage to be measured is subjected to first integration for a certain period of time; a reference voltage of the opposite polarity from the voltage to be measured is subjected to second integration until the integrated value obtained by the first integration returns to a predetermined value; measuring clock pulses are counted by a counter circuit in the period of the second integration; and the voltage to be measured is converted by the count value of the counter circuit into a digital value. In the A-D converter, there are provided a variable frequency divider and a memory having stored therein frequency dividing ratio determining signals for changing the frequency dividing ratio of the variable frequency divider. In the period of the second integration, the measuring clock pulses are supplied to the counter circuit through the variable frequency divider and each time the clock pulse is obtained, the frequency dividing ratio determining signals are each detected from the memory and preset in the variable frequency divider. And each time the number of clock pulses supplied to the counter circuit exceeds a certain number, the address of the memory is stepped by one. As a result of this, the frequency dividing ratio of the variable frequency divider sequentially changes, by which is obtained a digital converted value conforming to a non-linear characteristic of the voltage to be measured.

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Gyoda, Japan

Hikaru Furukawa