Globalwafers Japan Co., Ltd.

Hideyuki Okamura

Hironori Banba

Kozo Nakamura

Susumu Maeda

Koji Araki

Haruo Sudo

Koji Sueoka

A processing temperature Tby a rapid thermal processing furnace is 1250&#xb0; C. or more and 1350&#xb0; C. or less, and a cooling rate Rfrom the processing temperature is in a range of 20&#xb0; C./s or more and 150&#xb0; C./s or less, and thermal processing is performed by adjusting the processing temperature Tand the cooling rate Rwithin a range between the upper limit P=0.00207T&#xb7;R&#x2212;2.52R+13.3 (Formula (A)) and the lower limit P=0.000548T&#xb7;R&#x2212;0.605R&#x2212;0.511 (Formula (B)) of an oxygen partial pressure P in a thermal processing atmosphere.

Thermal processing method for silicon wafer

A silicon wafer includes a denuded zone which is a surface layer and of which the density of vacancy-oxygen complexes which are complexes of vacancies and oxygen is less than 1.0&#xd7;10/cm. An intermediate layer is disposed inwardly of the denuded zone so as to be adjacent to the denuded zone. The density of the vacancy-oxygen complexes in the intermediate layer increases gradually inwardly in the depth direction from the boundary with the denuded zone within a range of 1.0&#xd7;10/cmor over and less than 5.0&#xd7;10/cm. The intermediate layer has a depth determined corresponding to the depth of the denuded zone. A bulk layer is disposed inwardly of the intermediate layer so as to be adjacent to the intermediate layer. The density of the vacancy-oxygen complexes in the bulk layer is 5.0&#xd7;10/cmor over.

Silicon wafer

Growing community of inventors

Niigata, Japan

Hideyuki Okamura