Fujitsu Corporation

Hideyuki Noshiro

Masaaki Nakabayashi

Katsuyoshi Matsuura

Tetsuro Tamura

Shan Sun

Kazuaki Takai

Fan Chu

Takeyasu Saito

George Hickert

Soichiro Ozawa

Shigeyoshi Umemiya

Yoshimasa Horii

Masaki Kurasawa

Hideaki Yamauchi

Aki Dote

Seigen Otani

Kentaro Kinoshita

Kazuaki Kondo

Chikako Yoshida

Sha Zhu

Takashi Iiduka

Kou Nakamura

A resistance change device includes a first resistance change layer that occludes and discharges ions of at least one type, and resistance of the first resistance change layer, changes in accordance with an amount of the ions in such a manner that the resistance decreases when the ions are discharged and the resistance increases when the ions are occluded; a second resistance change layer that occludes and discharges the ions, and resistance of the second resistance change layer changes in accordance with the amount of the ions in such a manner that the resistance increases when the ions are discharged and the resistance decreases when the ions are occluded; and an ion conductive layer that carries the ions and is provided between the first resistance change layer and the second resistance change layer.

Resistance change device, manufacturing method for the same, and storage apparatus

A memory device includes: a memory element which includes three or more resistance states by using plural magneto-resistive elements each having a first resistance state or a second resistance state; and a comparison and determination circuit which compares the resistance states of the memory element before and after one first magneto-resistive element from among the plural magneto-resistive elements in the memory element is rewritten into the first resistance state, and determines the resistance state of the memory element in accordance with the comparison result.

Memory device

A magnetoresistance element includes: a first magnetoresistance subelement including a first free magnetization layer, a first tunnel insulating layer and a first fixed magnetization layer, the first tunnel insulating layer interposed between the first free magnetization layer and the first fixed magnetization layer; and a second magnetoresistance subelement including a second free magnetization layer, a second tunnel insulating layer and a second fixed magnetization layer, the second tunnel insulating layer interposed between the second free magnetization layer and the second fixed magnetization layer, wherein the first and second magnetoresistance subelements are stacked each other, and an order of the first free magnetization layer and the first fixed magnetization layer is opposite to an order of the second free magnetization layer and the second fixed magnetization layer in a thickness direction of the magnetoresistance element.

Magnetoresistance element and semiconductor memory device

In a resistance change memory (ReRAM) storing data by utilizing change in resistance of a resistance change element, a transistor T, interlayer insulating films, W plugs and the like are formed on a semiconductor substrate. Thereafter, a Pt film serving as a lower electrode of the resist change element is formed and a transition metal film (Ni film) is formed on the Pt film. After that, the surface of the transition metal film is oxidized to form a transition metal oxide film and a Pt film serving as an upper electrode is formed on the transition metal oxide film.

Method of manufacturing resistance change element

A composite resistance variable element includes a first resistance variable element in which a resistance value varies corresponding to a direction of inner magnetization, and a second resistance variable element connected in series to the first resistance variable element. A resistance value of the second resistance variable element varies corresponding to a magnitude of at least one of a voltage applied to the second resistance variable element and a current flowing through the second resistance variable element, irrespective of whether the voltage and the current are positive or negative.

Composite resistance variable element and method for manufacturing the same

A variable resistance device includes a first electrode including a transition metal nitride film, a second electrode including a precious metal or a precious metal oxide, and a transition metal oxide film interposed between the first and second electrodes.

Variable resistance device, method for manufacturing variable resistance device, and semiconductor storage device using variable resistance device

In a resistance change memory (ReRAM) storing data by utilizing change in resistance of a resistance change element, a lower electrode (ground-side electrode) of the resistance change element is formed of a transition metal such as Ni, and an upper electrode (positive polarity-side electrode) is configured of a noble metal such as Pt. In addition, a transition metal oxide film between the lower electrode and the upper electrode is formed of an oxide film (NiOx film) of a transition metal that is of the same kind as the transition metal constituting the lower electrode, for example.

Resistance change element and method of manufacturing the same

In a resistance change element (ReRAM) storing data by utilizing change in resistance of a resistance change element, the resistance change element is configured of a lower electrode made of a noble metal such as Pt, a transition metal film made of a transition metal such as Ni, a transition metal oxide film made of a transition metal oxide such as NiOx, and a lower electrode made of a noble metal such as Pt.

A resistance memory element which memorizes a high resistance state and a low resistance state and is switched between the high resistance state and the low resistance state by an application of a voltage includes a first electrode layer of titanium nitride film, a resistance memory layer formed on the first electrode layer and formed of titanium oxide having a crystal structure of rutile phase, and a second electrode layer formed on the resistance memory layer.

Resistance memory element, method of manufacturing resistance memory element and semiconductor memory device

A first interlayer insulation film is formed, on which a SiOcap film is then formed, and degassing of moisture in the first interlayer insulation film and the SiOcap film is preformed by heat treatment. Then, an AlOfilm is formed on the SiOcap film. Subsequently, heat treatment is performed on the AlOin an oxidation atmosphere, thereby accelerating oxidation of its surface. Thereafter, on the AlOfilm, a platinum film, a PLZT film, and an IrOfilm are formed and patterned, thereby forming a ferroelectric capacitor including an upper electrode, a capacity insulation film, and a lower electrode.

Semiconductor device and method for manufacturing the same

A method is disclosed for fabricating a semiconductor device having a memory employing a ferroelectric capacitor in which the orientation of the ferroelectric film is controlled. The method for fabricating the semiconductor device includes a first film deposition process for forming a first ferroelectric layer, and a second film deposition process for forming a second ferroelectric layer on the first ferroelectric layer. The film deposition temperature of the first film deposition process is set to at least 600&#xb0; C.

Method for fabricating semiconductor device

Provided is a method of manufacturing a ferroelectric capacitor capable of manufacturing a ferroelectric capacitor with lower unevenness on a ferroelectric film surface, and thereby with excellent electric characteristics. By sputtering method, a PZT film is formed on a first conductive film, which constitutes a lower electrode of the ferroelectric capacitor. Thereafter, the PZT film is subjected to crystallization treatment (annealing). Next, a silicate solution is coated on the PZT film as a sintering assistance and then dried. Subsequently, sintering treatment is performed at the temperature of about 700&deg; C. In this way, crystals constituting the PZT film are sintered, unevenness on the surface of PZT film is reduced, and tiny pores in grain boundaries are also reduced.

Method of manufacturing ferroelectric capacitor using a sintering assistance film

A ferroelectric random access memory has a ferroelectric capacitor formed of a stacking of a lower electrode, a PZT film and an upper electrode of SrRuO , wherein the PZT film includes pinholes, with a pinhole density of about 17 &mgr;m or less.

Ferroelectric semiconductor memory device and a fabrication process thereof

A ferroelectric random access memory has a ferroelectric capacitor formed of a stacking of a lower electrode, a PZT film and an upper electrode of SrRuO , wherein the PZT film includes pinholes, with a pinhole density of about 17/&mgr;m or less.

The present invention relates to semiconductor techniques using high dielectric oxides, more specifically to a thin film forming method for forming a thin film which is suitable as the electrodes of the oxide high dielectrics, a capacitor device using the oxide high dielectrics and a method for fabricating the same, an a semiconductor device using the capacitor device and a method for fabricating the semiconductor device. The capacitor device includes at least one of a pair of electrodes which is formed of a material containing titanium nitride of (200) orientation. This permits the capacitor device to have good quality even in a case that the capacitor dielectric film is formed of a high dielectric thin film grown in an oxidizing atmosphere. The capacitor device includes the electrodes of titanium nitride film, whereby the electrodes can be patterned by RIE, which much improves processing precision of the electrode patterning, and throughputs.

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Kawasaki, Japan

Hideyuki Noshiro