Ricoh Company, Ltd.

Hideyuki Aota

Hirofumi Watanabe

Hiizu Okubo

Keiichi Yoshioka

Akihiko Fujiwara

Seiji Yamanaka

Mitsuo Kaibara

Takako Maruyama

An amplifier includes a first amplifier comprising an N-type field-effect transistor receiving a reference voltage at a gate, a P-type field-effect transistor connected between a drain of the N-type field-effect transistor and a power supply voltage line, and a constant current source connected between a source of the N-type field-effect transistor and a ground, to output a voltage from a connection of the drain of the N-type and P-type field-effect transistors; a second amplifier comprising a resistance and P-type field-effect transistors connected in series between the power supply voltage line and the ground to receive the voltage output from the first amplifier at their gate, and outputting a voltage from a connection of the P-type field-effect transistor and the resistance; and a switch between an output of the first amplifier and the power supply voltage line and comprising an N-type field-effect transistor receiving a reference voltage at a gate.

Amplifier

A reference voltage generating circuit includes a resistance dividing circuit formed with resistors connected in series. This circuit includes: a first power supply circuit that is formed with field effect transistors, and outputs voltage having a negative temperature coefficient with respect to a change in environmental temperature; a source follower circuit that includes a first field effect transistor connected to the gate of the first power supply circuit, and the resistance dividing circuit formed with the resistors that are connected in series between the drain and ground of the first field effect transistor and between the source of the first field effect transistor and power supply voltage, and adjusts the deviation in the negative temperature coefficient of the voltage that is output from the first power supply circuit; and a second power supply circuit that is connected to the source follower circuit, is formed with field effect transistors, generates voltage having a positive temperature coefficient with respect to a change in environmental temperature, and outputs voltage having the deviation in temperature coefficient compensated for.

Reference voltage generating circuit

A reference voltage generating circuit for producing a predetermined reference voltage at an output node includes a depletion-type n-channel field-effect transistor serving as a first field-effect transistor having one node thereof coupled to a power supply voltage, a second field-effect transistor having one node thereof coupled to another node of the first field-effect transistor and having a highly-doped n-type gate, and a third field-effect transistor having one node thereof coupled to another node of the second field-effect transistor, another node thereof coupled to a ground voltage, and a highly-doped p-type gate.

Reference voltage generating circuit and constant voltage circuit

A reference voltage generator includes a first field effect transistor with n-type heavily doped gate structure and a second field effect transistor with p-type heavily doped gate structure. The first transistor is configured to have a gate and a substrate gate connected to ground, one terminal connected to a voltage supply, and another terminal connected to an output node. The second transistor is configured to have a gate and one terminal connected to the output node, and a substrate gate and another terminal connected to ground. The output node outputs a given reference voltage when voltage is supplied from the voltage supply. A voltage regulator that generates a constant voltage based on a given reference voltage incorporates the reference voltage generator.

Reference voltage generator and voltage regulator incorporating same

A reference voltage generation circuit includes: a first field-effect transistor that is an n channel-type field-effect transistor of a depletion-type, wherein one terminal of the first field-effect transistor is connected to a predetermined power source voltage; a second field-effect transistor including a concentrated n-type gate, wherein one terminal of the second field-effect transistor is connected to another terminal of the first field-effect transistor; and a third field-effect transistor including a concentrated p-type gate, wherein one terminal of the third field-effect transistor is connected to another terminal of the second field-effect transistor; wherein a gate of the first field-effect transistor is connected to a part where the first and the second field-effect transistors are connected, each substrate gate of the first and the third field-effect transistors is connected to a ground voltage, a gate and a substrate gate of the second field-effect transistor and a gate of the third field-effect transistor are connected to a connecting part where the second and the third field-effect transistors are connected, and a reference voltage is output from the connecting part.

Reference voltage generation circuit, and constant voltage circuit using the reference voltage generation circuit

A disclosed reference-voltage generating circuit includes a supply voltage adjusting circuit for adjusting an external supply voltage Vcc and outputting predetermined constant voltages VA and VB; a first voltage supply circuit for generating a voltage Vpn that has a negative temperature coefficient by using the voltage VA; and a second voltage supply circuit for generating a voltage Vptat that has a positive temperature coefficient by using the voltage VB, and for generating the reference voltage Vref, which does not have a temperature coefficient, by adding Vpn and Vptat and thereby canceling the temperature coefficients.

Reference-voltage generating circuit

A circuit for generating a constant current includes a reference voltage generating circuit configured to generate a reference voltage and a constant current circuit including one or more resistors configured to determine an amount of an electric current generated in response to the reference voltage, the one or more resistors being formed of a metal thin film.

Constant current generating circuit using resistor formed of metal thin film

A temperature sensor comprises (a) a first voltage generating circuit that generates and outputs a first voltage having a positive or negative temperature coefficient in proportion to the absolute temperature; (b) a second voltage generating circuit that generates a second voltage having an opposite sign of temperature coefficient compared to the first voltage and outputs a reference voltage that does not have a temperature coefficient based on the second voltage; and (c) a comparator that compares the first voltage output from the first voltage generating circuit with the reference voltage output from the second voltage generating circuit.

Temperature sensor

A charge/discharge protection circuit of the present invention includes a first terminal to which a negative electrode of a charger is connected and an internal detector unit which has an input connected to the first terminal, and prevents the variation of the threshold voltage of the input transistors in a short-circuit detector unit and in an overcurrent detector unit when the improper charger is connected to the battery for a long time. An improper charger detector unit outputs a detection signal when an improper charger is connected to the battery pack, in response to a voltage supplied to the first terminal by the improper charger. A connection cutoff unit cuts off, when the detection signal is output by the improper charger detector unit, the connection between the internal detector unit input and the first terminal, so that, when the improper charger is connected to the battery pack, a voltage of the input of the internal detector unit is avoided from being lower than a voltage of a second terminal to which a negative electrode of the battery is connected.

Charge/discharge protection circuit and battery pack having the charge/discharge protection circuit

A general-use register set includes a plurality of registers in a central processing unit body. A register-bank memory has memory regions relevant to the plurality of registers and is connected to the central processing unit. An output signal of an address circuit included in the central processing unit is supplied to the register-bank memory. Alternatively, an output signal of a decoding circuit included in the central processing unit may be supplied to the register-bank memory. A signal for selecting either activation or deactivation of the register-bank memory is a signal which indicates a selection of the deactivation of the register-bank memory except in a case where data is written in the general-use register set and a case of a restoration operation after register bank switching. Instead, a signal for selecting either generating or non-generating of a clock signal for the register-bank memory may be a signal which indicates a selection of the non-generation of the clock signal for the register-bank memory except in a case where data is written in the general-use register set and in a case of a restoration operation after register bank switching.

Information processing apparatus

A semiconductor memory device having a small chip area is provided to reduce a manufacturing cost. The semiconductor memory device has memory unit comprising memory cells arranged in a matrix comprising n rows and m columns, where m.gtoreq.2 and n.gtoreq.1, each of the memory cells having a single port and being capable of storing a single word of data comprising at least one bit, the memory cells arranged in a single column forming a memory cell block. The semiconductor memory device selects one set of two memory cells, one from an arbitrary memory cell block and the other from a different memory cell block. A reading operation performed and a writing operation for the set of two memory cells are performed during the same cycle. Another set of two memory cells are selected by a selecting unit, when the reading operation and the writing operation for one cycle are completed, for performing another cycle of the reading operation and the writing operation, the reading operation and the writing operation being repeated for a predetermined number of cycles.

Growing community of inventors

Hyogo, Japan

Hideyuki Aota