Denso Corporation

Kabushiki Kaisha Toyota Chuo Kenkyusho

Nippondenso Co., Ltd.

Nippon Soken, Inc.

Hideya Yamadera

Yasunori Taga

Yasutoshi Suzuki

Kenichi Ao

Norikazu Ohta

Tomohiko Mori

Hirofumi Funahashi

Tadashi Hattori

Keiji Aoki

Narumasa Soejima

Yutaka Nonomura

Tadashi Ozaki

Makio Iida

Takeshi Morikawa

Masaharu Takeuchi

Jiro Sakata

Yoshihiko Isobe

Takeshi Ohwaki

Hidemoto Tomita

Yuji Nishibe

Makoto Ohkawa

Yoshiki Seno

Haruhiko Inoue

Katsuhiko Ariga

Toru Ikeda

Hirofumi Abe

Naoki Hara

Hirofumi Kida

A semiconductor device includes a nitride semiconductor layer, a source electrode, a drain electrode, and an insulating gate portion. The nitride semiconductor layer has an element part and a peripheral withstand voltage part. The source electrode is disposed adjacent to a first main surface of the nitride semiconductor layer. The drain electrode is disposed adjacent to a second main surface of the nitride semiconductor layer. The nitride semiconductor layer is formed with a first groove on the first main surface in the element part, and a second groove on the first main surface in the peripheral withstand voltage part. A JFET region is embedded in the first groove in the element part. An inclination angle of a side surface of the first groove adjacent to a channel portion of a body region is smaller than an inclination angle of a side surface of the second groove.

Semiconductor device and method for manufacturing the same

A method of manufacturing a semiconductor device is provided, and the method may include: preparing a semiconductor substrate constituted of a group III nitride semiconductor, a main surface of the semiconductor substrate being a c-plane; forming a grove on the main surface by dry dry-etching the main surface; and wet-etching an inner surface of the groove using an etchant to expose the c-plane of the semiconductor substrate in a wet-etched region, the etching having an etching rate to the c-plane of the semiconductor substrate that is lower than the etching rate to a plane other than the c-plane of the semiconductor substrate.

Method of manufacturing semiconductor device

A magnetic sensor apparatus includes a semiconductor substrate and a magnetic impedance device for detecting a magnetic field. The magnetic impedance device is disposed on the substrate. The magnetic sensor apparatus has minimum size and is made with low manufacturing cost. Here, the magnetic impedance device detects a magnetic field in such a manner that impedance of the device is changed in accordance with the magnetic filed when an alternating current is applied to the device and the impedance is measured by an external electric circuit.

Method for manufacturing magnetic sensor apparatus

Magnetic impedance device, sensor apparatus using the same and method for manufacturing the same

A magnetic sensor element 1 includes a substrate 10, a conductive layer 12 of a conductive material, and a magnetic layer 11 of a magnetic material, which encloses the conductive layer 12. AC is applied to the element from a drive power source 50, and a detector 60 detects an impedance change due to an external magnetic field. The magnetic layer 11 is bestowed with magnetic anisotropy in a direction orthogonal to the direction of energization of the element 1. With the provision of the conductive layer 12 of conductive material and also with magnetic anisotropy imparted to the magnetic layer 1, the element 1 may be made a low resistivity element. A reactance change and a resistance change of the element due to an external magnetic field change, thus can be effectively detected in drive frequencies two orders of magnitude lower than in the case of a prior art magnetic sensor element. The magnetic anisotropy of the magnetic layer 11 is controlled to prevent magnetic field detection dynamic range variations with drive frequency.

Multilayered magnetic sensor having conductive layer within megnetic

A fuse fusible type semiconductor device capable of reducing energy required for fusing and a production method of the semiconductor device. In a semiconductor device equipped with a heat-fusible thin film resistor, the thin film resistor formed on a substrate 1 through an insulating film 2 is made of chromium, silicon and tungsten, and films 7 and 8 of a insulator including silicon laminated on the upper surface of the fusing surface, aluminum films 5 are disposed on both sides of the fusing surface and a barrier film 4. This semiconductor device is produced by a lamination step of sequentially forming a first insulating film 2, a thin film resistor 3, a barrier film 4 and an aluminum film 5 on a substrate 1 for reducing drastically fusing energy, an etching step of removing the barrier film 4 and the aluminum film 5 from the fusing region 31 of the thin film resistor 3, and an oxide film formation step of depositing the insulator including silicon films 7 and 8.

Semiconductor device equipped with a heat-fusible thin film resistor and

A ceramic substrate and a metallic layer formed thereon are bonded closely by means of a bonding layer formed between the ceramic substrate and the metallic layer. The ceramic substrate comprises either alumina or a ceramic containing alumina, and the metallic layer comprises either molybdenum (Mo) or an alloy composed of molybdenum (Mo) and at least one of titanium (Ti), zirconium (Zr) and niobium (Nb). The bonding layer comprises composite oxides of aluminum and at least one of titanium (Ti), zirconium (Zr) and niobium (Nb) and formed by either a process of (1) forming an intermediate layer comprising at least one of titanium (Ti), zirconium (Zr) and niobium (Nb) between the ceramic substrate and the metallic layer, and subjecting the laminated substance to a heat treatment to a cause a reaction between alumina and the intermediate layer; or (2) forming an alloy layer comprising an alloy of molybdenum (Mo) and at least one of titanium (Ti), zirconium (Zr) and niobium (Nb) directly on the ceramic substrate, and subjecting the laminated substance to a heat treatment to cause a reaction between alumina and at least one of titanium (Ti), zirconium (Zr) and niobium (Nb) contained in the alloy layer.

Ceramic substrate having a metallic layer thereon and a process for

A thin film resistor for a strain gauge prepared by physical or chemical vapor deposition. The resistor contains 60 to 98 atomic % of chromium, 2 to 30 atomic % of oxygen, and 0 to 10 atomic % of a metal or semiconductor. These constituents are uniformly distributed. The thickness of the film is between 0.01 and 10 .mu.m. The metal is at least one of Al, Ti, Ta, Zr and In, and the semiconductor is at least one of silicon, germanium and boron. The thin film resistor has excellent resistance-strain characteristics and resistance-temperature characteristics, as well as high sensitivity and mechanical strength.

Thin film resistor for strain gauge

Growing community of inventors

Nagoya, Japan

Hideya Yamadera