Victor Company of Japan, Limited

Hidetoshi Ozaki

Kaoru Kobayashi

Akira Goukura

Minoru Otani

Masaki Mori

Akira Hirota

Yoshihiko Ota

Masahiko Tsuruta

Kenji Shibayama

Hironori Akasaka

Masajhi Yoshida

Akira Gokura

In a helical-scan-type magnetic recording and playback method for forming diagonal tracks on a magnetic tape while recording and playing back digital data signals, the record and playback heads are installed on a rotating drum in a manner that enables the signal transfer delay associated with the record and playback signal processing of the digital data signal to be absorbed. The recording and playback is performed using a track pattern formed on the magnetic tape with the start and end points of the tracks located at distances of X and (L-X), respectively, from the lower edge of the tape, with L being the width of the tape, and X given by the equation:

Magnetic recording and reproducing method

In an encoding circuit for a digital video signal, a digital video signal is subjected to given orthogonal transform to be converted into corresponding conversion data. Components of the conversion data are scanned in a given order to generate a main data sequence from the conversion data. The main data sequence is separated into at least two sub data sequences. A first of the two sub data sequences is encoded into corresponding words of a given variable-length code. A second of the two sub data sequences is encoded into corresponding words of the variable-length code.

Processing system for digital video signal

A digital video signal coding circuit has a first DCT circuit for DCT converting a digital video signal with respect to frame and second DCT circuit for DCT converting the digital video signal with respect to fields which is used to reduce high frequency component of image. These outputs are selected according to high frequency components. The selected signal is separated to two signals respectively coded with data compression through VLC circuits which are provided to speed up the processing speed with non-industrial use ICs. A helical scan video tape recorder records the digital video signal such that at a lower portion (width direction) of slant track on a video tape, video data of an upper screen portion of the first field is recorded, at an upper portion of the track, video data of the upper screen portion of the second field is recorded, at a lower portion of the next slant track, video data of a lower screen portion of the first field is recorded, and at an upper portion, video data of the lower screen portion of the second field is recorded. This provides favorable image on a searching mode.

Digital video signal coding circuit, digital signal decoding circuit

An information reproduction apparatus for reproducing a frequency modulated signal, the information reproduction apparatus having a demodulation portion for demodulating the frequency modulated signal and a deemphasis portion for deemphasis the demodulated frequency modulated signal, comprises: a detection portion for detecting an inversion of levels of the demodulated frequency demodulated signal to produce an inversion detection signal, the inversion being such that the frequency demodulated signal is uncorresponding to the frequency modulated signal when the frequency modulated signal having an image of an edge portion; a compensation portion responsive to the inversion detection signal for compensate the demodulated frequency modulated signal, the compensated demodulated frequency modulated signal being supplied to the deemphasis portion. The apparatus may further comprise a dropout detection portion for detecting dropout of the demodulated frequency modulated signal to produce a dropout detection signal in the presence of the inversion detection signal and the dropout compensation portion responsive to the dropout detection signal for compensating the demodulated frequency modulated signal.

Frequency demodulating apparatus with inversion compensation

A color signal processing circuit which includes a conversion unit for converting two color difference signals, which are equivalent to color difference signals obtained by color demodulation of a color signal by using two color difference axes intersecting perpendicularly to each other. The color difference signals are converted into a color amplitude signal corresponding to the amplitude of the color signal and a color phase signal corresponding to the phase of the color signal. Also included is a signal processing unit for processing at least either of the color amplitude signal and the color phase signal. Thus, it is easy to obtain a color difference signal in which a residual phase error included in the color signal is eliminated.

Color signal processing circuit with residual phase error correction

Color signal processing circuit with residue phase error correction

A clock signal generator circuit includes a synchronous signal separation circuit for separating a synchronous signal from an input video signal; a phase-locked loop (PLL) circuit for generating a clock signal in synchronism with the synchronous signal of the video signal supplied from the separation circuit; a switch provided between the separation circuit and PLL circuit for intercepting a supply of the synchronous signal of the video signal from the separation circuit to the PLL circuit during a predetermined period; and a control circuit for further separating a vertical synchronous signal from the synchronous signal separated by the separation circuit and controlling, in accordance with the vertical synchronous signal, the switch so as to intercept a supply of the synchronous signal from the separation circuit to the PLL circuit during the predetermined period, the predetermined period being a pulse generation period during which there are present at least an equalizing pulse and dubbing preventing signal in the video signal.

Clock signal generator for video signal capable of generating a stable

In a video signal noise reducer circuit, an output video signal is delayed in a frame memory, then substracted from an input video signal, and the resultant difference signal then passed through a high pass filter. The difference signal and the filter output signal are then compared, and the one of these signals currently having the smaller absolute amplitude is modified by an amplitude-dependent feedback factor and then subtracted from the input video signal to obtain the output video signal.

Noise reducer circuit for video signal

An enhancing circuit wherein a color difference signal (b) is enhanced by utilizing the change of a luminance signal (a). The luminance signal (a) is sent, via a low-pass filter (2), a first delay circuit (3), a first differentiation circuit (4), a detector (5), a slicer (6), and a second differentiation circuit (7), to a comparator set (8) to produce two signals (i and j). The two signals (i and j) are sent to first and second sample-and-hold circuits (11 and 12). Meanwhile, the color difference signal (b) is delayed in a second delay circuit (10). In these two sample-and-hold circuit (11 and 12), such a delayed color difference signal (c) and color different signal (b) are respectively held in response to the two signals (i and j). Then, such two held signals (I' and II') and the delayed color difference signal (d) are sent to a switching circuit (13) for selecting one of these three signals (I', II', III') in accordance with the combination of the two signals (i and j) thereby producing an enhanced color difference signal (k). Since the luminance signal (a) has a wide frequency band, color-ringing of an image can be satisfactorily reduced.

Circuit for enhancing a color difference signal by utilizing the change

An enhancing circuit wherein a color difference signal (b) is enhanced by utilizing the change of a luminance siganal (a). The luminance signal (a) is sent, via a low-pass filter (2), a first delay circuit (3), a first differentiation circuit (4), a detector (5), a slicer (6), and a second differentiation circuit (7), to a comparator set (8) to produce two signals (i and j). The two signals (i and j) are sent to first and second sample-and-hold circuits (11 and 12). Meanwhile, the color difference signal (b) is delayed in a second delay circuit (10). In thses two sample-and-hold circuit (11 and 12), such a delayed color difference signal (c) and color difference signal (b) are respectively held in response to the two signals (i and j). Then, such two held signals (I' and II') and the delayed color difference signal (d) are sent to a switching circuit (13) for selecting one of these three signals (I', II', III') in accordance with the combination of the two signals (i and j) thereby producing an enhanced color difference signal (k). Since the luminance signal (a) has a wide frequency band, color-ringing of an image can be satisfactorily reduced.

A video signal processing circuit for aperture correction or picture restoration having a high frequency range emphasis filter which provides a signal whose high frequency range emphasized, a plurality of delay circuits connected serially which output signals having different delay times and a selector which effects level comparison among the input signal the output signals with delays and which supplies the maximum or minimum of them to a first limiter as its threshold level and the minimum or maximum of them to a second limiter as its threshold level. The first limiter limits the high frequency range emphasized signal and the second limiter limits the output signal of the first limiter. A high frequency component extraction circuit and a noise suppressor which suppress noise in high frequency component and adder which adds together the output of the second limiter and the output of the noise suppressor may be used.

Video signal processing circuit

A carrier chrominance signal processing circuit for use in an apparatus such as a video tape recorder is based upon a feedback comb filter for enhancing the S/N ratio of the playback carrier chrominance signal, and circuits for detecting vertical coherence in a playback luminance signal and carrier chrominance signal respectively. Loop feedback within the feedback comb filter is controlled in accordance with a plurality of specific combinations of conditions of vertical coherence and vertical non-coherence of the carrier chrominance signal and luminance signal, such as to minimize vertical color blurring being produced by the operation of the feedback comb filter while effectively suppressing noise components in the playback carrier chrominance signal.

Carrier chrominance signal processing circuit

A video signal digital processing system comprises an A/D converter for converting an input analog video signal employing the NTSC or system into a digital video signal, a first frequency converter for generating a signal sampled at a frequency f.sub.s which is a predetermined integer times a horizontal synchronizing signal frequency f.sub.H of the input analog video signal by frequency-converting the digital video signal so that the chrominance subcarrier frequency is converted into a frequency f.sub.s /4, a decimation circuit for performing a 1/3 decimation process with respect to the output signal of the first frequency converter by extracting samples with an interval of two samples, a processing circuit for subjecting an output signal of the decimation circuit to a predetermined signal processing, an interpolation circuit for performing an interpolation process complementary to the decimation process with respect to an output signal of the processing circuit, a second frequency converter for subjecting an output signal of the interpolation circuit to a frequency conversion complementary to the frequency conversion performed in the first frequency converter, and a D/A converter for converting an output signal of the second frequency converter into a an analog video signal.

Video signal digital processing system using lower sampling frequency

A digital phase difference detecting circuit has a phase shifting circuit for shifting by +90.degree. or -90.degree. a phase of an input signal which has been sampled over a predetermined sampling period, a dividing circuit for dividing an output signal of the phase shifting circuit by the input signal, an operation circuit for performing an inverse trigonometric function operation on an output signal of the dividing circuit, and a subtracting circuit for obtaining the difference between an output signal of the operation circuit and a phase of a reference signal. The resulting output signal of the subtracting circuit indicates the phase difference between the reference signal and the input signal.

Digital phase difference detecting circuit

A noise reduction circuit for video signal comprises first through third circuits each for obtaining from an input video signal a high frequency component including a noise component and for limiting large amplitude parts thereof, where a filter part of the second circuit has an impulse response characteristic wherein an amplitude increases or decays with time and is complementary to that of a filter part of the first circuit and a filter part of the third circuit has an impulse response characteristic which is essentially a combination of the two impulse response characteristics, and a fourth circuit for carrying out a subtraction between the input video signal and an output signal of the first circuit so as to obtain a first signal which is substantially eliminated of the noise component except for a noise component and distortion remaining at parts in vicinities of rises and falls in the video signal caused by the amplitude limitation carried out in the first circuit, carrying out a subtraction between output signals of the second and third circuits so as to obtain a second signal which includes the noise component and the waveform distortion of the first signal with an inverted phase, and for adding the first and second signals so as to produce an output video signal which has been substantially eliminated of all the noise component.

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Tokyo, Japan

Hidetoshi Ozaki