Sony Corporation

Hidetoshi Nishimoto

Mitsushige Tatami

Michio Mita

Junichi Yanagisawa

Kimiyasu Sato

Described herein is the converting between a component SDI signal D1 and a composite SDI signal D2. A single memory is prepared. Further, the corresponding signal is written into the memory in accordance with a clock corresponding to a transfer rate of the SDI signal D1 and the corresponding signal is read from the memory in accordance with a clock corresponding to a transfer rate of the SDI signal D2. The digital signal read from the memory is re-distributed based on header information added to the SDI signal D2. Pieces of header information (ADF, DID, DBN, DC and CS) corresponding to conversion modes are added to the outputted digital signal. Thus, the cost down to the signal converting can be achieved by providing a single signal conversion memory alone and reducing signal conversion memories and their peripheral circuits.

Signal converting apparatus and method

A matrix switching apparatus includes a plurality of switching units connected in tandem, each switching unit having a plurality of input terminals and a plurality of output terminals. There are a plurality of transmission/reception units, each provided within a respective switching unit and also within a remote control unit. The transmission/reception units are for transmitting switching data. A first one of the transmission/reception units is set to a master station mode and sequentially polls the remaining transmission/reception units which are set to a slave station mode. The remaining units respond to the polling by outputting switching data, which is collectively transmitted by the master station over a serial busline. The remaining transmission/reception units receive only relevant data from the switching data transmitted over the serial busline and supply the relevant data to controlling units which control the turning on and off of crosspoint switches in the switching units.

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Kanagawa, Japan

Hidetoshi Nishimoto