Mitsubishi Electric Corporation

Hidetoshi Harada

Hiroo Kanamaru

Yoshitomo Asano

Keiichi Yato

A safety computing device includes a processor and a memory. The memory includes a first memory area and a second memory area having an address different from the first memory area. The processor includes an execution control unit performing a first process including the program process on input data written in the first memory area, and a second process including the program process on input data written in the second memory area and addition of redundancy code to output data written in the second memory area, a result collating unit collating output data to which redundancy code is added in the first and second processes, a computation diagnosis unit diagnosing presence or absence of failure in the processor and the memory, and an abnormality processing unit that, when an abnormality is detected by at least one of redundancy check, collation, and diagnosis, stops outputting output data.

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Tokyo, Japan

Hidetoshi Harada