Sumitomo Chemical Company, Limited

Mie University

Tohoku University

Sciocs Company Limited

Hideto Miyake

Kazumasa Hiramatsu

Takayoshi Maeda

Yasushi Iyechika

Shinya Bohyama

Hajime Fujikura

Yoshinobu Ono

Taichiro Konno

Hiroyuki Fukuyama

Yoshihiko Tsuchida

Naohiro Nishikawa

There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the substrate; (b) applying annealing to the first layer in an inert gas atmosphere; and (c) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum on the first layer by a vapor phase growth after performing (b), and constituting the nitride semiconductor layer by the first layer and the second layer.

Nitride semiconductor template and nitride semiconductor device

There is provided a method for manufacturing a nitride semiconductor template constituted by forming a nitride semiconductor layer on a substrate, comprising: (a) preparing a pattern-substrate as the substrate, with a concavo-convex pattern formed on a front surface of the pattern-substrate, (b) forming a first layer by epitaxially growing a nitride semiconductor containing aluminum on the concavo-convex pattern of the pattern-substrate, in a thickness of not flattening a front surface; (c) applying annealing to the first layer; and (d) forming a second layer by epitaxially growing a nitride semiconductor containing aluminum so as to overlap on the first layer after performing (c), and in a thickness of flattening a front surface, and constituting the nitride semiconductor layer by the first layer and the second layer.

A method for manufacturing a nitride semiconductor substrate includes: a preparation step of preparing a sapphire substrate; and a buffer layer forming step of forming an AlN buffer layer on the sapphire substrate, wherein the buffer layer forming step includes: a group III nitride semiconductor forming step of forming a precursor of an AlN buffer layer on the sapphire substrate; and an annealing step of annealing the sapphire substrate on which the precursor of the AlN buffer layer is formed in a gas-tight state in which a principal surface of the precursor of the AlN buffer layer is covered with a cover member (such as a sapphire substrate) for inhibiting a component of the group III nitride semiconductor from dissociating from the principal surface of the formed precursor of the AlN buffer layer.

Method for manufacturing nitride semiconductor substrate

A substrate having an annealed AlN layer includes a substrate made of a material selected from among a group including sapphire, silicon carbide (SiC), and aluminum nitride (AlN), and an aluminum nitride (AlN) layer formed on the substrate and having a thickness of 100 nm or greater. The aluminum nitride layer is annealed at a prescribed annealing temperature and in a nitrogen/carbon monoxide (N/CO) mixed gas atmosphere, and the nitrogen/carbon monoxide (N/CO) mixed gas has a mixture ratio of Ngas/CO gas in a range of 0.95/0.05 to 0.4/0.6.

Substrate having annealed aluminum nitride layer formed thereon and method for manufacturing the same

A group 3-5 nitride semiconductor multilayer substrate () and a method for manufacturing such substrate are provided. A semiconductor layer () is formed on a base substrate (), and a mask () is formed on the semiconductor layer (). Then, after forming a group 3-5 nitride semiconductor crystalline layer () by selective growing, the group 3-5 nitride semiconductor crystalline layer () and the base substrate () are separated. The crystallinity of the semiconductor layer () is lower than that of the group 3-5 nitride semiconductor crystalline layer ().

Group 3-5 nitride semiconductor multilayer substrate, method for manufacturing group 3-5 nitride semiconductor free-standing subtrate, and semiconductor element

The present invention relates to a method for producing an epitaxial substrate having a III-V group compound semiconductor crystal represented by the general formula InGaAlN (wherein, x+y+z=1, 0&#x2266;x&#x2266;1, 0&#x2266;y&#x2266;1, 0&#x2266;z&#x2266;1) having reduced dislocation density, comprising a first step of covering with a mask made of a different material from the III-V group compound semiconductor so that only portions around points of the crystal constitute openings by using a III-V group compound semiconductor crystal having a plurality of projection shapes and a second step of growing the III-V group compound semiconductor crystal laterally by using the III-V group compound semiconductor crystal at the opening as a seed crystal. According to the present invention, an epitaxial substrate having a III-V group compound semiconductor crystal having low dislocation density and little warp is obtained.

Substrate of gallium nitride single crystal and process for producing the same

When a crystal layer of III-V Group nitride compound semiconductor is formed, a nitride compound semiconductor layer is first overlaid on a substrate to form a base layer and a III-V Group nitride compound semiconductor represented by the general formula InGaAlN (where 0&#x2266;x&#x2266;1, 0&#x2266;y&#x2266;1, 0&#x2266;z&#x2266;1, x+y+z=1) is epitaxially grown on the base layer by hydride vapor phase epitaxy at a deposition pressure of not lower than 800 Torr. By making the deposition pressure not lower than 800 Torr, the crystallinity of the III-V Group nitride compound semiconductor can be markedly improved and its defect density reduced.

Method of manufacturing III-V group compound semiconductor

Provided is a III-V compound semiconductor having a layer formed from a first III-V compound semiconductor expressed by the general formula InGaAlN (where 0&#x2266;u&#x2266;1, 0&#x2266;v&#x2266;1, 0&#x2266;w&#x2266;1, u+v+w=1), a pattern formed on the layer from a material different not only from the first III-V compound semiconductor but also from a second III-V compound semiconductor hereinafter described, and a layer formed on the first III-V compound semiconductor and the pattern from the second III-V compound semiconductor expressed by the general formula InGaAlN (where 0&#x2266;x&#x2266;1, 0&#x2266;y&#x2266;1, 0&#x2266;x&#x2266;1, x+y+z=1), wherein the full width at half maximum of the (0004) reflection X-ray rocking curve of the second III-V compound semiconductor is 700 seconds or less regardless of the direction of X-ray incidence. In the III-V compound semiconductor, which is a high quality semiconductor, the occurrence of low angle grain boundaries is suppressed.

III-V compound semiconductor

A method for fabricating a GaN-based III-V Group compound semiconductor is provided that utilizes a regrowth method based on the HVPE method to form a second III-V Group compound semiconductor layer having a flat surface on a first III-V Group compound semiconductor layer formed with a mask layer. The method uses a mixed carrier gas of hydrogen gas and nitrogen gas to control formation of a facet group including at least the &lcub;33-62&rcub; facet by the regrowth, and conducting the regrowth until a plane parallel to the surface of the first III-V Group compound semiconductor layer is once annihilated, thereby fabricating a III-V Group compound semiconductor having low dislocation density.

Method for fabricating III-V group compound semiconductor

Provided is a method of producing a group III-V compound semiconductor having a low dislocation density without increasing the thickness of a re-grown layer, the method includes a re-growing process using a mask pattern, and threading dislocations in the re-grown layer are terminated by the voids formed on the pattern.

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Tsu, Japan

Hideto Miyake