Sony Corporation

Sony Corportion

Hideto Isono

Hiroshi Hibi

Isao Hirota

Yukinobu Wataya

Hiromichi Matsui

A semiconductor device such as a solid state imaging device has a semiconductor chip mounted on a bottom surface of a cavity of a hermetic sealed box-shaped resin-molded package. The device comprises a radiator plate provided in a bottom wall of the package under the cavity or on the bottom surface of the cavity. The semiconductor chip and the radiator plate are bonded with an adhesive having a larger thermal conductivity than that of the resin forming the package. The radiator plate may be a part of a lead frame.

Semiconductor device including solid state imaging device

A semiconductor apparatus connected between a signal input line and a grounding line is formed on a semiconductor substrate with a protection circuit connected between the signal input line and the grounding line, in parallel with the semiconductor apparatus. The protection circuit is formed, for example, of bipolar transistors, diodes, or MOS transistors.

Semiconductor apparatus and horizontal register for solid-state image

A semiconductor apparatus connected between a signal input line and a grounding line is formed on a semiconductor substrate with a protection circuit connected between the signal input line and the grounding line, in parallel with the semiconductor apparatus. The protection circuit is formed, for example, of bipolar transistors, diodes, or MOS transistors. The protection circuit is designed to prevent an excess signal supplied on the signal line from damaging the semiconductor apparatus, such as by breaking down a dielectric layer formed at a gate of a MOS transistor. The protection circuit may further be connected to a potential line that is connected to an external source of voltage.

A protective circuit protects a plurality of protected portions having different withstand voltages and operation voltages of an active portion of a CCD solid state imaging device or the like by protective elements (e.g., transistors). The respective protected portions can be protected in an optimum fashion in response to the withstand voltages and operation voltages thereof. The breakdown voltages of the respective protective transistors are made different in response to the withstand voltages and operation voltages of the protected portions.

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Kanagawa, Japan

Hideto Isono