Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Renesas Electronics Corporation

Other

Mitsubishi Electric Engineering Company, Limited

Mitsubushi Denki Kabushiki Kaisha

Mitsubhishi Denki Kabsuhiki Kaisha

Hideto Hidaka

Tsukasa Ooishi

Mikio Asakura

Kazuyasu Fujishima

Shigeki Tomishima

Takahiro Tsuruda

Masaki Kumanoya

Hideshi Miyatake

Katsuhiro Suma

Kazutami Arimoto

Hiroaki Tanizaki

Katsumi Dosaka

Yoshio Matsuda

Kiyohiro Furutani

Hiroshi Kato

Masatoshi Ishikawa

Takaharu Tsuji

Masakazu Hirose

Masaki Tsukude

Yasuhiro Konishi

Kenichi Yasuda

Tetsuo Kato

Tsutomu Yoshihara

Tomoya Kawagoe

Yuto Ikeda

Hiroyuki Yamasaki

Kei Hamade

Takashi Kono

Masanori Hayashikoshi

Kazuhiro Tsukamoto

Hideyuki Ozaki

Yuichiro Komiya

Kazutoshi Hirayama

Masaki Shimoda

Mitsutaka Niiro

Masanao Maruta

Fukashi Morishita

Jun Ohtani

Shinji Kawai

Yoshito Nakaoka

Yasuhiko Okasaka

Masaaki Ura

Hiroki Shimano

Shigehiro Kuge

Makoto Suwa

Yasumasa Nishimura

Yasumitsu Murai

Jun Otani

Konishi Yasuhiro

Tsukasa Ohishi

A tunnel magnetic resistive element forming a magnetic memory cell includes a fixed magnetic layer having a fixed magnetic field of a fixed direction, a free magnetic layer magnetized by an applied magnetic field, and a tunnel barrier that is an insulator film provided between the fixed and free magnetic layers in a tunnel junction region. In the free magnetic layer, a region corresponding to an easy axis region having characteristics desirable as a memory cell is used as the tunnel junction region. A hard axis region having characteristics undesirable as a memory cell is not used as a portion of the tunnel magnetic resistive element.

Thin film magnetic memory device capable of conducting stable data read and write operations

An end of a selected bit line in a selected column is electrically coupled to an end of a corresponding current return line by one of first and second write column select gates, which are selectively turned on in response to results of column selection. A data write circuit sets the other end of the selected bit line and the other end of the current return line to one and the other of a power supply voltage and a ground voltage in accordance with a level of write data via one of first and second data buses and an inverted data bus, respectively.

Thin film magnetic memory device writing data with bidirectional current

In the data read operation, a memory cell and a dummy memory cell are respectively coupled to two bit lines of a selected bit line pair, a data read current is supplied. In the selected memory cell column, a read gate drives the respective voltages on a read data bus pair, according to the respective voltages on the bit lines. A data read circuit amplifies the voltage difference between the read data buses so as to output read data. The use of the read gate enables the read data buses to be disconnected from a data read current path. As a result, respective voltage changes on the bit lines are rapidly produced, and therefore, the data read speed can be increased.

Thin film magnetic memory device including memory cells having a magnetic tunnel junction

A logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film. An operation power supply line to the logic gate is provided with an MIS transistor having a thick gate insulation film for switching the supply and stop of an operation power source voltage. A voltage of the gate of the power source switching transistor is made changing in an amplitude greater than an amplitude of an input and an output signal to the logic gate. Current consumption in a semiconductor device configured of MIS transistor of a thin gate insulation film can be reduced and an power source voltage thereof can be stabilized.

Low power consumption MIS semiconductor device

A thin film magnetic memory includes a size-variable Read Only Memory (ROM) region and a size-variable Random Access Memory (RAM) coupled to different ports for parallel access to the ports, respectively. A memory system allowing fast and efficient data transfer can be achieved.

Semiconductor memory device operational processing device and storage system

Between the value of an electric current and the supply duration for which the electric current is supplied that cause magnetization reversal, there is the relation of monotonous decrease. This means that, as the supply duration is shortened, the threshold current value for causing the magnetization reversal is larger. Therefore, in terms of suppressing occurrence of read disturb, the read current supply duration may be shortened to increase the threshold value of the current causing the magnetization reversal and thereby ensure a sufficient read disturb margin. Therefore, the read current supply duration may be shortened relative to the write current supply duration ensure the read disturb margin and suppress occurrence of read disturb.

Magnetic random access memory having improved read disturb suppression and thermal disturbance resistance

Read word lines and write word lines are provided corresponding to the respective MTJ (Magnetic Tunnel Junction) memory cell rows, and bit lines and reference voltage lines are provided corresponding to the respective MTJ memory cell columns. Adjacent MTJ memory cells share at least one of these signal lines. As a result, the pitches of signal lines provided in the entire memory array can be widened. Thus, the MTJ memory cells can be efficiently arranged, achieving improved integration of the memory array.

Thin film magnetic memory device having a highly integrated memory array

A nonvolatile semiconductor memory device includes a free layer having first and second magnetic layers magnetized oppositely to each other, and also having a first nonmagnetic layer formed between the first and second magnetic layers, a first fixed layer having a fixed magnetization direction, a second nonmagnetic layer formed between the second magnetic layer and the first fixed layer, a first drive circuit passing a write current through a first write current line in a data write operation, and thereby generating a data write magnetic field acting on magnetization of the free layer, and a second drive circuit passing a spin injection current between the first magnetic layer and the first fixed layer in a data write operation, and thereby exerting a force in the same direction as or in the direction opposite to the magnetization direction of the first fixed layer on the magnetization of the free layer.

Nonvolatile semiconductor memory device performing data writing in a toggle manner

Semiconductor memory device, operational processing device and storage system

After a digit line is charged to a power supply voltage by turn-on of a first switching element, the first switching element is turned off and a second switching element is turned on, whereby the digit line is connected to a ground voltage. Similarly, in order to feed data write current, a bit line is charged to a data voltage in accordance with write data through a third switching element. Then, the bit line is connected to a voltage different from the data voltage by a fourth switching element while the third switching element is turned off. Therefore, a load current from a power supply to an MRAM device is supplied during charging of a digit line capacitance and a bit line capacitance, without being consumed when the data write current flows. Consequently, a peak of the load current supplied from the power supply is suppressed.

Thin film magnetic memory device suitable for drive by battery

Growing community of inventors

Hyogo, Japan

Hideto Hidaka