Nec Corporation

The Tokyo Electric Power Company, Incorporated

Nec Corporation and the Tokyo Electric Power Company, Incorporated

Hidetake Nakamura

Tadashi Kobayashi

Toshio Takagi

Shigeo Fushimi

Masatoshi Komatsu

Shigenori Wada

Yohsuke Shinada

A rectifier circuit device wherein a FET element for rectification and a diode for reflux are provided inside of one package. In this rectifier circuit device, there are provided a first external connection terminal connected to a drain of the FET element, a second external connection terminal connected to a source of the FET element and an anode of the diode inside of the package, and a third external connection terminal connected to a gate of the FET element and a cathode of the diode inside of the package. The FET element and the diode are integrated on the same chip.

Rectifier circuit device and DC/Dc converter provided with the circuit

A power MOSFET includes common source and drain terminals and a selection circuit. The sources and drains of a plurality of insulated gate field-effect transistors are respectively connected in parallel to the common source and drain terminals. The selection circuit selectively connects the gates of the insulated gate field-effect transistors to a gate terminal common to a source.

Power MOSFET

Power source circuitry is disclosed and has a DC power source and a switching circuit positioned at the primary side, a diode and a coil positioned at the secondary side and serially connected to a load, and a capacitor connected in parallel to the load. A current bypass circuit is connected in parallel to the load, and operates when a voltage applied to the load momentarily increases. When a current flowing through a load sharply decreases, the current bypass circuit conducts an abnormal current to be input to the load to the negative side. This suppresses the momentary increase in the voltage applied to the load. In a normal condition, no potential differences occur between the base and the emitter of a transistor, so that the transistor remains in an OFF state and prevents a current from flowing through the bypass circuit.

Switching power source circuitry having a current bypass circuit

A rectifier for a DC/DC converter includes first and second FETs, first and second capacitors, and first and second resistors. The first FET is connected in series with the secondary winding of a main transformer of the DC/DC converter. The second FET is connected in parallel with the series circuit constituted by the secondary winding of the main transformer and the first FET. The first and second capacitors are respectively connected between the gate of the first FET and the drain of the second FET and between the gate of the second FET and the drain of the first FET. The first and second resistors are respectively connected between the gate and source of the first FET and between the gate and source of the second FET.

Rectifier for DC/DC converter

In a watt-hour meter in which first and second input signals representing an analog electric current and an analog voltage of an alternating current are converted into first and second digital signals, a first adder produces a sum signal which represents a sum of the first input signal and an additional analog signal of a frequency different from that of the first input signal and which is substituted for the first input signal. The meter may further comprise a second adder which adds another additional analog signal to the second input signal. Alternatively, the meter comprises low-pass filters and oversample-and-convert circuits to produce the first and the second input digital signals.

Meter for accurately measuring integrated electric power

In a reactive volt-ampere-hour meter, either of a pair of electric signals representative of, respectively, an AC voltage and an AC current fed to a load has the phase thereof shifted by 90 degrees to produce a signal representation of a product of the two signals. A cumulative adder cumulates the resulting product signals. A first carry pulse and a borrow pulse are generated in the event of, respectively, an overflow and an underflow during cumulation and are fed to a first and a second up-down counter, respectively. The first up-down counter up-counts the first carry pulses and down-counts the borrow pulses and generates a second carry pulse when an overflow occurs. The second up-down counter up-counts the borrow pulses and down-counts the first carry pulses and generates a third carry pulse in the event of an overflow. An up-counter up-counts the second and third carry pulses from the first and second up-down counters, respectively. The count of the up-counter is representative of the result of cumulation of the absolute values of reactive power, i.e., the amount of reactive power.

Reactive volt-ampere-hour meter

In a watt-hour meter in which first and second input signals representing an analog electric current and an analog voltage of an alternating current are converted into first and second digital signals, a first adder produces a sum signal which represents a sum of the first input signal and an additional analog signal of a frequency different from that of the first input signal and which is substituted for the first input signal. The meter may further comprise a second adder which adds another additional analog signal to the second input signal. Alternatively, the meter comprises low-pass filters and oversample-and-convert circuits to produce the first and the second input digital signals. As a further alternative, the meter comprises a first inverter for inverting a selected one of the first and the second input signals into a first inverted signal. In this event, a first selector alternatingly selects one of the first inverted signal and the selected one of the first and the second input signals and the other of the first inverted signal and the selected one of the first and the second input signals at a predetermined time interval as a first selected signal. A second inverter for inverting a product signal representing a product of the first and the second digital signals into a second inverted signal. Ganged with the first selector, a second selector alternatingly selects one of the second inverted signal and the product signal at the predetermined time interval as a second selected signal so that the second inverted signal is selected when the first selector selects the first inverted signal.

Growing community of inventors

Tokyo, Japan

Hidetake Nakamura