Kabushiki Kaisha Toshiba

Hokuriku Pharmaceutical Co., Ltd.

Hokuriku Seiyaku Co., Ltd.

Fujitsu Corporation

Other

Unisia Jecs Corporation

Fuji Yakuhin Co., Ltd

Horuriku Seiyaku Co., Ltd.

Hokoriku Pharmaceutical Co., Ltd.

Hideo Kato

Eiichi Koshinaka

Masamichi Asano

Yasuo Itoh

Hiroto Nakai

Kaoru Tokushige

Yasuo Ito

Nobuo Ogawa

Hidetoshi Saito

Tomoharu Tanaka

Yoshiyuki Tanaka

Riichiro Shirota

Yoshihisa Iwata

Seiichi Aritome

Yutaka Okamoto

Masaki Momodomi

Hideko Odaira

Takashi Mori

Tokumasa Hara

Yasuhiko Honda

Masao Kuriyama

Takafumi Ikeda

Hiroyuki Nishino

Nobutake Sugiura

Hiroshi Iwahashi

Yoshio Mochizuki

Shinichi Kikuchi

Shingo Yasuda

Tatsuya Hiramatsu

Kiyotaka Uchigane

Tomoyasu Nishikawa

Jun Sakaguchi

Yukihiro Abiko

Makoto Takeshita

Kazuya Mitani

Toshihiko Yoshida

Nobuhiko Iwasaki

Sakae Kurata

Noriyuki Kado

Tetsuo Koezuka

Yuuichi Tatsumi

Naoto Tomita

Akira Narita

Shunichiro Sakurai

Tomio Suzuki

Kouji Morikawa

Takaaki Mouri

Kagari Yamagishi

Yasuo Itho

Noboru Shibata

Yoshiyuki Okada

Toshio Yamamura

Takamichi Kasai

Hiroyuki Sasaki

Osamu Nagata

Noriyuki Yagi

Hiroyuki Sawanishi

Yoichi Yamamoto

Masahiro Yamazaki

Kazuya Matsuo

Shinji Saito

Hiroshi Nakamura

Hiroshi Watanabe

Seiichi Mori

Takahiro Sato

Tadayuki Taura

Hitoshi Shiga

Kiyomi Naruke

Yasuhiko Nakano

Taira Iwase

Isao Sato

Hiroyoshi Hidaka

Akira Karasudani

Kazuhisa Kanazawa

Shinichiro Kobayashi

Junichiro Uda

Toshio Tanaka

Mitsuru Shiraishi

Yoshiyuki Iwabuchi

Shigeru Matsuda

Kazuyoshi Mori

Yoshihisa Nakayama

Toshie Yamauchi

Tutomu Inoue

Nobuhide Kawasaki

Ippei Tanaka

Masaharu Yamazaki

Takeo Ishibashi

Naoki Kurita

Masakazu Kitayama

Tomohiko Ishikawa

Singo Yasuda

Masanori Namiki

Kenji Yano

Noriyuki Kada

Yuzuro Yamamoto

Kazunori Nishide

Ikuo Uesaka

Takehisa Yamada

An identification device measures a potential difference signal between two contact electrodes contacted by a driver out of a plurality of electrodes installed in a handling unit or a potential difference signal between one contact electrode installed in the handling unit and a contact electrode different from the electrodes installed in the handling unit. The device identifies a contact electrode contacted by driver's hand out of the plurality of electrodes installed in the handling unit. The device determines whether the driver's hand in contact with the identified contact electrode is the right hand or the left hand on the basis of a rotational state of the handling unit and a position of the contact electrode in the handling unit. The device identifies the heart beat from the potential difference signal amplified by an amplification factor determined on the basis of a result of determination.

Identification device

A total of n signal processing circuits respectively constituted by independent circuit blocks process signals at the Data Link and Physical Layers. The signal processing circuits are associated with respective n groups of M/n subcarriers each, to process signals at the Data Link and Physical Layers. For example, the signal processing circuit independently processes signals of the subcarrier group at the Data Link and Physical Layers, the signal processing circuit independently processes signals of the subcarrier group at the Data Link and Physical Layers, and so on. The signal processing circuit independently processes signals of the subcarrier group at the Data Link and Physical Layers.

Wireless base station and signal processing method

A compound represented by the formula (1) or a salt thereof (represents a single bond, or a double bond; Rrepresents hydrogen atom, or an alkyl group; Rand Rrepresent hydrogen atom, or an alkyl group; Rand Rrepresent hydrogen atom, hydroxy group, an alkoxyl group, a halogen atom, or a mono- or di-alkyl-substituted amino group; Rrepresents hydrogen atom, cyano group, an alkoxycarbonyl group, or carboxy group; Rrepresents one or two of substituents on the benzene ring (the substituents are selected from hydrogen atom, a halogen atom, nitro group, cyano group, hydroxy group, amino group, an alkyl group, and an alkoxyl group); A represents a 5-membered or 6-membered non-aromatic heterocyclic ring containing one or two contiguous sulfur atoms (the sulfur atoms may independently form oxide); Wrepresents oxo group, hydrogen atom, an alkyl group, hydroxy group, an alkoxyl group, or a halogen atom; and X represents oxygen atom, or sulfur atom), or a salt thereof, which has a superior suppressing action against prostaglandin Eproduction and is useful as an active ingredient of medicaments with reduced adverse reactions such as gastrointestinal disorders. 

Phenylacetic acid derivative

A frame, which is the data unit, is extracted without decoding MPEG audio data. Then, a scale factor included in the frame is extracted and an evaluation function is calculated based on the scale factor. If the value of the evaluation function is larger than a prescribed threshold value, the speed of the frame is converted. If the value of the evaluation function is smaller than the prescribed threshold value, the frame is judged to be a frame in a silent section and neglected. The speed conversion is made by thinning out frames or repeating the same frame as many times as required according to prescribed rules.

Data reproduction device, method thereof and storage medium

A nonvolatile semiconductor memory includes a cell array, redundancy array, erase circuit, timer, and controller. The cell array has a plurality of memory cells. The redundancy array has a plurality of redundant cells capable of replacing the memory cell. The erase circuit performs an erase operation on a target cell including the memory cell or the redundant cell. The timer measures the time elapsed from the start of the erase operation performed for the target cell by the erase circuit. The controller stops the erase operation and replaces the target cell with the redundant cell, when detecting that a predetermined time has elapsed from the start of the erase operation by the measurement of the elapsed time by the timer.

Nonvolatile semiconductor memory including redundant cell for replacing defective cell

A video recording and reproducing apparatus for simultaneously displaying a plurality of image contents recorded at given time points or images at a plurality of given portions within the same image contents is disclosed. A plurality of images read from a randomly accessible data storage unit for storing the images recorded by an image recording unit are synthesized into a single screen by an image synthesizer. An information processing unit reads from the image recording unit a plurality of image contents recorded at different time points or a group of images recorded at a plurality of different time points in a given one image content and causes the image synthesizer to display, by synthesizing the image contents or the images, as the case may be, on a single screen.

Video recording and reproducing apparatus

A semiconductor device includes a memory cell array including a plurality of cores, each of said cores including one block or a plurality of blocks. The semiconductor device further includes a first power supply line which is provided commonly for said plurality of cores and which provides a data reading power supply potential; a second power supply line which is provided commonly for said plurality of cores and which provides a data writing or erasing power supply potential; and a power supply line switching circuit which is provided for each of said plurality of cores and which selectively connects a corresponding one of said plurality of cores to said first power supply line or said second power supply line in accordance with whether said corresponding one of said plurality of cores is in a data read mode or a data write or erase mode.

Semiconductor device that enables simultaneous read and write/read operation

An information collecting unit reads encoded moving image data from an information storing unit, decodes part of the moving image data, extracts the number and the magnitudes of motion vectors, the square measure of a region having a low correlation with a preceding/succeeding frame, etc. for each frame, and outputs these items of scene change information to an evaluation function calculating unit. The evaluation function calculating unit calculates the value of a predetermined evaluation function based on the scene change information, and outputs the calculated value to a scene change determining unit. The scene change determining unit determines a frame of a scene change by making a comparison between the calculated value and a threshold value. A scene change information storing unit stores the scene change information used for the determination.

Image processing device, method and storage medium thereof

In a data erasing method of a nonvolatile semiconductor memory device, cells are subjected to the processings of executing programming by applying a voltage to the cells to set their threshold values at a given level or more, erasing the cells to set their threshold values at a lower level or less, executing weak programming once on a cell whose threshold value is lower than a further lower level, by applying a lower voltage to the cell, repeating the weak programming on the cell when its threshold value is still lower than the further lower level, until the value reaches the further lower level or more, verifying whether a cell is present whose threshold value is higher than the lower level, and returning the processing to the processing of setting the threshold values of the cells at the lower level or less, when verifying that the above cell is present.

Nonvolatile semiconductor memory device which erases data in units of one block including a number of memory cells, and data erasing method of the nonvolatile semiconductor memory device

The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite operation, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.

Non-volatile semiconductor memory device and memory system using the same

A semiconductor device has a memory cell array having the arrangement of a plurality of cores, each of which comprises one block or a set of a plurality of blocks, each block defining a range of memory cells serving as a unit of data erase. The semiconductor device has a bank setting memory circuit configured to select an optional number of cores of the cores as a first bank and to set the remaining cores as a second bank, so as to allow a data read operation to be carried out in one of the first and second banks while a data write or erase operation is carried out in the other of the first and second banks.

The time required for the program verify and erase verify operations can be shortened. The change of threshold values of memory cells can be suppressed even if the write and erase operations are executed repetitively. After the program and erase operations, whether the operations were properly executed can be judged simultaneously for all bit lines basing upon a change, after the pre-charge, of the potential at each bit line, without changing the column address. In the data rewrite oepration, the rewrite operation is not effected for a memory cell with the data once properly written, by changing the data in the data register.

A semiconductor memory device includes: a plurality of banks with electrically rewritable memory cells arranged therein, the banks being configured to be simultaneously accessible in such a manner that a data write operation into a bank and a data read operation for another bank are simultaneously performed; a write-use data bus commonly disposed for the plurality of banks; a read-use data bus commonly disposed for the plurality of banks; a write circuit connected to the write-use data bus; a read circuit connected to the read-use data bus; a bank address decoder circuit for decoding external bank address signals for bank selecting to output internal bank address signals, the bank address decoder circuit having such an address conversion function that one of plural kinds of address conversions between the external bank address signals and the internal bank address signals is selectable; and a rewrite control circuit for sequence controlling a data write operation for a bank selected by the bank address decoder circuit.

Semiconductor memory device

A semiconductor integrated circuit device includes a first memory cell array corresponding to bank, a second memory cell array corresponding to bank, first address transition signal generating circuits which detect transitions of input addresses and generate first address transition signals, a second address transition signal generating circuit which pre-detects an end of automatic execution of bankor bankand generates a second address transition signal, and a read start trigger output circuit. The read start trigger output circuit outputs a read start trigger signal on the basis of the first address transition signals and the second address transition signal.

Semiconductor integrated circuit device and read start trigger signal generating method therefor

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Kawasaki, Japan

Hideo Kato