Hitachi, Ltd.

Hitachi Microcomputer Engineering, Ltd.

Hitachi Chemical Company, Ltd.

Hitachi Engineering Co., Ltd.

Hideo Inayoshi

Ikuya Kawasaki

Kunihiro Tsubosaki

Atsushi Hasegawa

Masaharu Kubo

Kazunari Suzuki

Susumu Narita

Daisuke Makino

Yoshiaki Wakashima

Kazuhiko Iwasaki

Tsuneo Funabashi

Takao Yaginuma

Nobuo Ichimura

Eiki Kondoh

Akira Suzuki

Mitsuyoshi Yamamoto

Hideo Iwasawa

Toyoichi Ueda

A microcomputer has a clock generator capable of changing the frequency of an output clock signal: and a power circuit capable of changing the level of an operating voltage to be outputted. The frequencies of clock signals and the levels of operating voltages to be individually fed to a plurality of circuit modules can be dynamically changed according to the content of a packaged register. If the content of the register instructs the reduction of the clock signal frequency and the operating voltage in its absolute value, the operating voltage is lowered in its absolute value prior to the change in the clock signal frequency. On the contrary, if the instruction is to increase the frequency of the clock signal and the operating voltage in its absolute value, the clock signal having the increased frequency is outputted prior to the increase of the operating voltage in the absolute value. As a result, it is possible to prevent in advance the malfunctions of the circuit at the time of switching the operation frequency and the operating voltage of the circuit module.

Data processor and single-chip microcomputer with changing clock

When a microprocessor fetches an instruction to be processed by a coprocessor, it sends to the coprocessor a command corresponding to the instruction while informing the coprocessor that the bus cycle is in the mode of transfer of the instruction to the coprocessor. In transferring an operand from the memory to the coprocessor, the microprocessor asserts, in addition to a usual memory read signal, a signal (CYCYCL) indicative of validity of the coprocessor and instructs the coprocessor to fetch data to thereby complete the operand transfer from memory to coprocessor within one bus cycle. In transferring data from the coprocessor to the memory, the microprocessor asserts, in addition to a usual memory write signal, the CYCYCL signal and instructs the coprocessor to deliver the data to thereby complete the data transfer from memory to coprocessor within one bus cycle. Thus, the signal transfer between memory and coprocessor can be completed within one bus cycle without resort to the provision of duplicate hardware in the coprocessor.

Data processing system with coprocessor

In a resin packaged semiconductor device including a semiconductor element, the back side of which is bonded to a support and the front side of which has electrodes which are electrically connected to electroconductive portions by fine leads, when an adhesive composition comprising an epoxy resin, a novolak type phenolic resin, a solvent for the both resins and a powdery filler, and if necessary, a curing accelerator and a coupling agent, is used for binding the semiconductor and the support, the resulting semiconductor device is excellent in moisture resistance and corrosion resistance.

Semiconductor device and process for producing the same

In a semiconductor device, the surface of a semiconductor element is covered with a silicone varnish in which the side chain radical ratio between methyl radicals and phenyl radicals is 20:1 or greater, whereby the element is effectively shielded from the external moisture.

Semiconductor device

Growing community of inventors

Kokubunji, Japan

Hideo Inayoshi