Nec Corporation

Billcon Corporation

Fuji Giken Kabushiki Kaisha

Hideo Abe

Yoshikazu Takagi

Takahiro Ogawa

Hiroyuki Shimada

Makoto Shinkai

Masaru Tanaka

Sam Iravantchi

Jonathan R Lucas

Satoru Sonobe

Travis S Cochran

John B Dowden

Fariborz R Beroukhim

Yukinobu Kimoto

Hiroshi Takeba

Portable biometric scanner

A paper identification counter comprises a counter body, a hopper which is formed to the counter body and to which papers to be identified and counted are fed, a paper conveyance unit including a conveyance passage along which the papers such as currency notes from the hopper is conveyed one by one in a direction of a short width side of the papers, a paper identification unit disposed on a way of the conveyance passage for identifying and counting the papers; and a stacker in which the papers delivered from the conveyance passage are stacked. The conveyance passage includes a U-shaped curvilinear conveyance region on a way between the hopper and the stacker.

Paper identification counter and paper identification and counting method

A semiconductor memory circuit includes a plurality of memory cells arranged in an array form, a plurality of data lines for reading and writing data, a plurality of address lines each for transferring an address signal that specifies a corresponding specific memory cell, a control unit for controlling reading and writing of the data, a plurality of data input and data output terminals for inputting and outputting the data, a write enable signal input terminal to which a write enable signal for permitting writing of the data is applied, and at least one control signal input terminal to which either a cell clear signal for clearing the data stored or a cell initialization signal for performing the initialization of the data is applied. Data reading, data writing and data clearing or data initializing are performed through the plurality of data lines and the plurality of address lines. The hardware area to be occupied is reduced due to a reduction in the number of the cell transistors and also by a reduction in the number of signal lines.

Semiconductor memory circuit having bit clear and/or register initialize

A data processing unit according to the present invention has a central processing unit, and an analog-to-digital converter circuit associated with a plurality of input nodes respectively supplied with analog signals. The analog-to-digital converter circuit is established in one of three modes of operations, i.e., a fixed mode of operation for focusing the A/D converting operation on one analog signal of a specified input node, a scanning mode of operation for sequentially converting the analog signals into corresponding digital signals and a mixed mode of operation for performing the fixed mode of operation once or a predetermined number of times before automatically returning to the scanning mode of operation, so that the central processing unit does not need to shift the analog-to-digital converter circuit from the fixed mode to the scanning mode if the mixed mode is selected, thereby improving the throughput of the central processing unit.

One-chip data processor with built-in A/D converter for automatically

The bank notes in a bank note container are delivered one at a time by means of feed rollers and a delivery roller. The delivered bank notes are detected by sensor means. A signal from the sensor means is transferred to a control mechanism which drives or stops the delivery roller. The delivery roller is stopped and is driven again in response to a signal from an encoder carried by a supporting shaft of pull rollers. Therefore the bank notes are delivered from the bank note delivery container to the outside thereof in a predeterminedly spaced apart relationship.

Bank note dispenser

Growing community of inventors

Tokyo, Japan

Hideo Abe