Matsushita Electric Industrial Co., Ltd.

Matsushita Electronics Corporation

Hidenori Tanaka

Yoshinori Odake

Takashi Maejima

Mitsuyoshi Andou

Toshimoto Kubota

A stacked gate portion, including a tunnel insulating film, a floating gate electrode, a capacitive insulating film and a control gate electrode, is formed over a p-type Si substrate. In the p-type Si substrate, n,source/drain layers and n,source/drain layers, each layer containing arsenic, are formed. In the drain region, an n,drain layer, containing phosphorus and overlapping with an entire edge of the stacked gate portion in the gate width direction, and a p layer surrounding the bottoms of the n,and the n,drain layers are provided. In such a structure, an electric field applied between the floating gate electrode and the drain is weakened and the drain-disturb characteristics are improved during writing.

Nonvolatile semiconductor memory device and method for fabricating the same

A method for fabricating a nonvolatile semiconductor memory device having a stacked gate portion, including a tunnel insulating film, a floating gate electrode, a capacitive insulating film and a control gate electrode, formed over a p-type Si substrate. In the p-type Si substrate, n.sup.++ source/drain layers and n.sup.+ source/drain layers, each layer containing arsenic, are formed. In the drain region, an n.sup.- drain layer, containing phosphorus and overlapping with an entire edge of the stacked gate portion in the gate width direction, and a p layer surrounding the bottoms of the n.sup.+ and the n.sup.- drain layers are provided. In such a structure, an electric field applied between the floating gate electrode and the drain is weakened and the drain-disturb characteristics are improved during writing.

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Nara, Japan

Hidenori Tanaka