Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Hidenori Takeda

Akihiko Nishio

Yasuhiro Uemoto

Masahiro Hikita

Takahiro Sato

Hideyuki Okita

Toshiharu Tambo

A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer () located over the substrate; a second nitride semiconductor layer () located over the first nitride semiconductor layer (), having a larger band gap than the first nitride semiconductor layer (), and having a recess () penetrating into the first nitride semiconductor layer (); and a third nitride semiconductor layer () continuously covering the second nitride semiconductor layer () and the recess (), and having a larger band gap than the first nitride semiconductor layer (); a gate electrode () located above a portion of the third nitride semiconductor layer () over the recess (); and a first ohmic electrode () and a second ohmic electrode () located on opposite sides of the gate electrode ().

Nitride semiconductor device and method for manufacturing same

A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer above the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer; a p-type nitride semiconductor layer above the second nitride semiconductor layer; two third nitride semiconductor layers of n-type above the second nitride semiconductor layer and located separately on either side of the p-type nitride semiconductor layer; and a first ohmic electrode above one of the two third nitride semiconductor layers and a second ohmic electrode above the other of the two third nitride semiconductor layers; and a gate electrode above the p-type nitride semiconductor layer. The second nitride semiconductor layer includes, in a region above which neither the p-type nitride semiconductor layer nor the two third nitride semiconductor layers is located, a surface layer including p-type impurities identical to those in the p-type nitride semiconductor layer.

Semiconductor device and method of manufacturing semiconductor device

In the method for manufacturing a heterojunction bipolar transistor, a collector contact layer, a collector layer, a base layer, a base protection layer, an emitter layer, an emitter contact layer, and a WSi layer are sequentially formed on a substrate. A resist pattern is then formed on the WSi layer, and the WSi layer is patterned by using the resist pattern as a mask. Thereafter, the emitter contact layer and the emitter layer are sequentially removed by ICP (Inductively Coupled Plasma) dry etching by using the resist pattern as a mask.

Heterojunction bipolar transistor and manufacturing method thereof

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Nara, Japan

Hidenori Takeda