Dialog Semiconductor (UK) Limited

Dialog Semiconductor Gmbh

Panasonic Corporation

Hidenori Kobayashi

Jindrich Svorc

Akira Inoue

Horst Knoedgen

Daisuke Kobayashi

Mark Johnathan Childs

Julian Tyrrell

Kiwamu Watanabe

Ko Inagaki

Akihiko Kubota

Seiichi Ozawa

Naoyuki Unno

Takashi Fujisaki

Soichiro Ohyama

Seigo Yanase

Terumasa Ide

Yu Haraki

Yasushi Hayashi

Hyungtaek Chang

Tsuyoshi Matsumoto

Hidechika Yokoyama

Masaki Sumi

Andrew Repton

Santhos Ario Wibowo

A solution is provided for a current balance feedback method to improve stability in a multi-phase DC-DC switching converter, where the current balance feedback signal is added to the PWM duty signal, after the PWM comparator. Using this feedback method, current balance oscillation issues caused by the non-linearity of the main control loop can be solved, and provide better current balance stability in the switching converter. Advantages include improving the stability of the current balance feedback loop by introducing the correction post PW modulation in the time domain, effectively bypassing interaction with the PW modulator. The current balance feedback loop stability improvement reduces PCB design effort and iteration.

Current balance feedback circuit and method to improve the stability of a multi-phase converter

A transient response circuit provides faster transient response time of an electronic device so that less overshoot or undershoot of an output signal of the electronic device occurs when a large load and/or line transient signal is present at an input and/or output terminal of the electronic device. The transient response circuit has a transient detection circuit and an assist circuit. The transient detection circuit monitors a feedback signal applied to an input terminal of the control stage, and generates transient detection signals indicating that detection of a large load and/or line transient signal has occurred. The assist circuit communicates receives the transient detection signal and charges or discharges a loop filter capacitor of the control stage for causing the control stage to regulate the output signal to decrease overshoot or undershoot upon receipt of the transient detection signal.

Type III switching converter error amplifier with fast transient response behavior

A system is disclosed which provides the minimization of peak-to-peak output voltage ripple in multi-phase DC-DC switching converters, with two or more different value inductors (asymmetric inductors), by the optimization of phase-shifting determined by the inductance on each phase. An object of the disclosure is to ensure both the AC accuracy of the output voltage and the efficiency of the DC-DC switching converter is increased. The output voltage ripple improvement is shown to be dependent on the duty-cycle. Another object of the disclosure is to minimize the total inductor current ripple and improving the efficiency of the DC-DC switching converter by reducing the capacitor loss. Still another object of the disclosure is to minimize the output voltage ripple in the multi-phase DC-DC switching converter by ensuring the sum of the inductor current vectors is equal to zero.

Phase-shifting optimization for asymmetric inductors in multi-phase DC-DC converters

A circuit and method for power converter for improved current monitoring, comprising a buck converter comprising a high side switch, a current sensing circuits parallel to the buck converter configured to sense a current through a low side switch, and a positive slope inductor coil estimator sensing circuit parallel to a buck converter configured to estimate a current magnitude.

Control scheme for hysteretic buck controller with inductor coil current estimation

Systems and methods for providing a boost converter with an improved stability are disclosed. A sample and hold circuit is connected to the output of the boost converter. That sample and hold circuit holds the output voltage before the main switch of the boost converter turns ON and holds the voltage while the main switch is ON. Thus a high frequency oscillation can be eliminated, an increased control bandwidth without stability problems can be achieved, and no complicated additional circuit is required.

Boost converter with improved stability

A multi-phase DC-to-DC converter is configured to achieve fast transient response and to optimize efficiency over the load range. Phase shedding changes the active number of phases according to output currents. Each phase of the converter has an inductor configured to optimize the efficiency for a range of load currents in which that phase is used. A converter may have 3 phases, the first used only in sleep mode and has a large inductance with low AC losses, the second used in sync mode at low currents and having a lower inductance with low AC losses, the third phase is used in sync mode at high currents and has small inductance with low DC losses. The number of phases is &#x2267;2.

Asymmetric inductors in multi-phase DCDC converters

A control circuit included within a multi-phase switched-mode converter is configured for adjusting operational signals for adding power stages of the multi-phase switched-mode converter to dynamically respond to transient changes in load current for minimizing undershoot while avoiding overshoot of an output voltage of the multi-phase switched-mode converter. The control circuit has panic comparators configured such that each panic comparator has an input terminal connected to receive the output voltage for comparison with one of a plurality of reference voltages. A panic controller receives panic indicator signals from the panic comparators and determines which of the power stages are to be activated to match the transient change to the load current to prevent for minimizing undershoot and for preventing overshoot of the output voltage of the multi-phase switched-mode converter. The multi-phase switched-mode converter may operate in a continuous or discontinuous conduction mode.

Multi-threshold panic comparators for multi-phase buck converter phase shedding control

Measurement circuits which are configured to measure wide ranges of the input voltage using a sensed input voltage of the driver circuits for solid state lighting (SSL) devices are presented. The measurement circuit comprises a first resistor which is coupled at a first side to the input voltage. The measurement circuit comprises current mirror circuitry coupled at an input to a second side of the first resistor, and which translates an input current at the input of the current mirror circuitry into an output current at an output of the current mirror circuitry, such that the output current is proportional to the input current by a current mirror ratio. The measurement circuit comprises a second resistor coupled to the output of the current mirror circuitry and to provide the sensed input voltage, when the input voltage is coupled to the first side of the first resistor.

LED mains voltage measurement using a current mirror

An apparatus and method for a multi-phase switch regulator with improved efficiency is disclosed. The device has parallel implementations for the different phases comprising a driver, a current sense variable gain amplifier, a current share circuit, a pulse width modulation (PWM) control circuit, a trim network, and an inductor. A method is disclosed of providing a system with current sharing function comprising a driver circuit, a current sense circuit, a current share circuit, a PWM control circuit and a trim circuit, providing a current sense circuit for each segment of a driver circuit, sensing a signal using a current sense circuit for each segment of a driver circuit, comparing the output of the current sense circuit, providing the current error information to a PWM controller, generating a PWM drive signal of each phase, and finally, equalizing the output of the current sense amplifier. Other methods that utilize dummy output stages and low pass filter feedback is disclosed.

Apparatus and method for current sharing in a multi-phase switching regulator

An apparatus and method for a bandgap voltage reference circuit with improved operation for a low voltage power supply. A bandgap voltage reference circuit which is operable at low power supply voltage for power supplies of 1.3V comprising of a first npn bipolar transistor, a second npn bipolar transistor, a third npn bipolar transistor, a first resistor, a second resistor, a third resistor, a fourth resistor, and a first, second and third p-channel MOSFET. The matched second resistor and third resistor, and the first and third npn bipolar transistor pair establishes a &#x394;Vbe dependent current (a PTAT current), and the fourth resistor established a &#x394;Vbe to establish a bandgap voltage of approximately 1.2V.

Apparatus and method for a modified brokaw bandgap reference circuit for improved low voltage power supply

Compensation capacitor voltages of DC-to-DC converters are pre-set without switching to enable smooth transition from sleep mode to active mode. Appropriate compensation capacitor voltages are set regardless of the length of no-switching sleep period or input voltage change. Therefore the converter can always start with appropriate error amplifier and duty conditions, and avoid output voltage disturbance when the PWM control loop takes over in active mode the control of buck converter. The appropriate capacitor voltages are enabled by creating a local PWM feedback loop of a PWM control loop without enabling the output stage. This local PWM feedback loop works intermittently and always sets the appropriate voltage for the error amplifier and compensation capacitor.

Method to pre-set a compensation capacitor voltage

A switching regulator with an output high threshold voltage setting and an output low threshold voltage setting that permits a plurality of different operating modes to be established. Combined with these two threshold voltages is the ability to adjust both threshold voltages over the full range of the regulator output voltage, which yields switching regulator modes of forced normal operation, automatic where the operating mode is dependent upon output current and forced sleep mode.

Method of automatic mode change in switching regulators

Circuits and related methods for energy efficient battery supplied switching DC-to-DC regulators are disclosed. When entering a power-down state the energy in an output capacitor is harvested and charged back to the battery. This is achieved by ramping-down a reference voltage after a power-down sequence is initiated. The output voltage of the regulator is ramped-down accordingly. At the end of the power down sequence the output voltage of the regulator is down to 0V. The disclosure is especially important for regulators, which frequently are started up and switched down.

Powering down switching regulator using a ramped reference voltage

Systems and methods for providing a buck-boost converter with an improved efficiency are disclosed. The buck-boost converter disclosed operates in 5 different modes, namely in buck mode, half frequency buck mode, half frequency buck-boost mode, half frequency boost mode, and in boost mode. In half frequency buck mode, buck-boost mode, and in half frequency boost mode the switching frequency is halved compared to the switching frequency of buck or boost mode. A simple circuit implementation by adding two offset voltages in ramp signals or PWM comparators enables to halve the switching frequency if required.

Buck-boost converter with improved efficiency operation

A hermetic compressor includes a thrust ball bearing () on the thrust face () of the main bearing (). The thrust ball bearing () includes balls () held in a holder (), an upper race () and a lower race () arranged respectively on and beneath the balls (), and an elastic support member () below the balls (). The hermetic compressor is prevented from causing a load to be applied unevenly to the balls (), thereby achieving high efficiency, low noise level, and high reliability.

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Kawasaki, Japan

Hidenori Kobayashi