Sony Corporation

Hidenobu Mochizuki

Takeshi Matsushita

Hisao Hayashi

Teruaki Aoki

Takashi Shimada

Kenichi Inoue

Takaji Ohtsu

Masanori Okayama

Jiro Yamaguchi

A semiconductor memory comprising a memory cell comprising a MOS transistor connected between a bit line and a reference potential terminal; a sense amplifier coupled to the bit line for reading out a potential on the bit line, the sense amplifier comprising an inverter having an input and output connected to each other via a switch; and a circuit element interposed between the bit line and the sense amplifier operative to only transmit bit line potential changes in a direction of the reference potential.

Semiconductor memory

In a memory type insulated gate field effect semiconductor device including a semiconductor layer of one conductivity type, a source region of the opposite conductivity type formed in the surface of the semiconductor layer, a drain region of the opposite conductivity type formed in the surface of the semiconductor layer, a gate insulating layer affixed to the surface of the semiconductor layer, and a gate electrode deposited on the surface of the gate insulating layer, the gate insulating layer has a pair of thick gate guarding portions which exist on side of the source and drain regions, and a thin memory portion intermediate between the thick gate guarding portions, and a surface impurity concentration per square centimeter of the semiconductor layer under the thick gate guarding portions is different from a surface impurity concentration per square centimeter of the semiconductor layer under the tin memory portion. The voltage difference between the threshold voltages of the semiconductor device at the memorized state and at the non-memorized state can be increased, and the read-out voltage of the semiconductor device can be reduced. The circuit design is simplified.

Memory type insulating gate field effect semiconductor device

A semiconductive device is provided which includes a single crystal substrate. A first insulating layer arranged on one surface of the substrate is of polycrystalline silicon containing oxygen. A second insulating layer formed on the first insulating layer is of polycrystalline silicon containing one of a group consisting of nitrogen, Si.sub.3 N.sub.4, Al.sub.2 O.sub.3 and silicone resin. The substrate includes at least one PN junction which extends to the said surface of the substrate. A novel method of making is also disclosed.

Semiconductor device with two passivating layers

A method for fabricating a semiconductor device includes the steps of forming a first polycrystalline silicon layer containing oxygen atoms on a semiconductor layer, of forming a second polycrystalline silicon layer containing nitrogen atoms on the first polycrystalline silicon layer, of removing a predetermined part of the first and second polycrystalline silicon layers to form an opening therein, and of diffusing impurity material into the semiconductor layer through the opening in order to form a diffused region. The fabricating process can be remarkably simplified.

Growing community of inventors

Kanagawa, Japan

Hidenobu Mochizuki