Tokyo Shibaura Denki Kabushiki Kaisha

Hidemi Yamamoto

Akio Tanaka

Michio Arai

Yusaku Miki

Yuichi Kimihira

Yasuo Fukuda

A data processor having a stack area with a desirable variable size formed on a desirable area of a main memory unit in accordance with a direction by a user program, is provided with a stack control register group for controlling the stack area. A stack upper address register in the stack control register group holds the upper address specified on the stack area. The stack lower address register holds the lower limit address specified. A control stack pointer register holds the start address of a control stack area formed on the stack area for storing the number of a register specified by a user program and the contents thereof. A data stack pointer register holds the start address of the data stack area which is formed on said stack area and used by the user program.

Stack control system and method for data processor

A data processor includes a base register for a base address modification and a program counter for a relative address modification. An instruction executed in the data processor includes an operation code, a first operand, an address modification judgement bit, an index address modification field, a base address modification field and a displacement. When the instruction is fetched, it is arranged in an address modification and a base modification according to the address modification judgement bit. In the case of the relative address modification, the contents of the program counter is added to the contents of the displacement. In the case of the base address modification, the contents of the base register specified by the base address modification field is added to the contents of the displacement. In the relative address modification and the base address modification, the contents of the general register specified by the index address modification is added to the results of the addition, thereby to form an effective address.

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Kunitachi, Japan

Hidemi Yamamoto