Seiko Epson Corporation

Hideki Yuzawa

Kazunori Sakurai

Takeshi Yuzawa

Michiyoshi Takano

Kazuhiro Kijima

A semiconductor chip is provided comprising a semiconductor substrate on which an integrated circuit is formed. The semiconductor chip, which is provided on the semiconductor substrate in an area array, further comprises a plurality of electrodes electrically coupled with the inside of the semiconductor substrate, wherein the electrodes are arranged into a plurality of first groups respectively lined along a plurality of paralleling first straight lines and, further, into a plurality of second groups respectively lined along a plurality of second straight lines which extend so as to intersect with the first straight lines.

Semiconductor chip and semiconductor device, and method for manufacturing semiconductor device

A semiconductor wafer examination method that includes: preparing a wafer formed with a chip area for use as a semiconductor chip; firstly examining the wafer by probing; pressing an electrode of the wafer with a pressure member having a flat surface; and secondly examining the wafer by probing.

Semiconductor wafer examination method and semiconductor chip manufacturing method

A semiconductor device including: a semiconductor section in which an element is formed; an insulating layer formed on the semiconductor section; an electrode pad formed on the insulating layer; a contact section formed of a conductive material provided in a contact hole in the insulating layer and electrically connected with the electrode pad; a passivation film formed to have an opening on a first section of the electrode pad and to be positioned on a second section of the electrode pad; a bump formed to be larger than the opening in the passivation film and to be partially positioned on the passivation film; and a barrier layer which lies between the electrode pad and the bump. The contact section is connected with the second section at a position within a range in which the contact section overlaps the bump while avoiding the first section of the electrode pad.

Semiconductor device that improves electrical connection reliability

A semiconductor device is provided including a substrate containing a wire pattern having a plurality of leads and a semiconductor chip mounted on the substrate in a manner that an electrode faces the wire pattern. The electrodes are arranged to be classified into a plurality of first groups respectively lined along a plurality of paralleling first straight lines and into a plurality of second groups respectively lined along a plurality of second straight lines extending in a direction so as to intersect with the first straight lines. Each lead includes a connecting part facing one electrode, an extension part extending along the first straight line from the connecting part, and a draw-out part that is drawn from the extension part so as to intersect with the first straight line.

Semiconductor device and electronic device, and methods for manufacturing thereof

First alignment marks are provided on a film substrate in a manner that they are located at positions offset from the disposed positions of second alignment marks provided on a semiconductor chip. The amount of expansion or contraction of the film substrate is obtained by measuring the distance between the first alignment marks. Based on the amount of expansion or contraction, the semiconductor chip is shifted with respect to the film substrate and mounted thereon.

Semiconductor module, electronic device and electronic equipment, and method for manufacturing semiconductor module

First bump electrodes are arrayed in a straight line along a first side of a semiconductor chip. Second bump electrodes are more narrowly arrayed in a zigzag arrangement along a second side of the chip. By carrying out an injection of a sealing resin from the second side on which the second bump electrodes are arrayed, a surface of the semiconductor chip that is subjected to face-down mounting on a film substrate is sealed.

Manufacturing method of semiconductor device, including differently spaced bump electrode arrays

A substrate supporting a plurality of interconnecting patterns arranged in matrix is cut at a position at least between adjacent columns of the interconnecting patterns. A plurality of positioning marks are formed on the substrate and arranged on a straight line between adjacent columns of the interconnecting patterns. Cutting of the substrate is performed by using the positioning marks as reference.

Wiring board and method of fabricating tape-like wiring substrate

A method of manufacturing a semiconductor device includes mounting of a semiconductor chip on a substrate. In the mounting step, electrodes of the semiconductor chip and leads formed on the substrate are disposed to face each other. Each of the electrodes has a bump including a soldering or brazing material in at least part of a bonding section bonded to corresponding one of the leads. After providing an insulating material around the electrodes and leads, the soldering or brazing material is melted, and the electrodes are respectively bonded to the leads.

Semiconductor device and method of manufacturing the same, and electronic instrument

A wiring board includes a wiring pattern having a lands and a line connected to the land, a substrate supporting the wiring pattern, and a protective film provided over the substrate and having an opening. The land has a first portion which includes a connecting portion connected to the line and is covered by the protective film, and a second portion exposed by the opening. A hole for exposing the substrate is formed at least in the first portion of the land.

Growing community of inventors

Iida, Japan

Hideki Yuzawa