Kabushiki Kaisha Toshiba

Kioxia Corporation

Toshiba Memory Corporation

Sony Corporation

Yokogawa Electric Corporation

Kabushiki Kaisha Riken

Toshiba Solutions Corporation

Toshiba Battery Co., Ltd.

Toshiba Memory Coiporation

Hideki Yoshida

Shinichi Kanno

Tatsunori Kanai

Hiroshi Nishimura

Masaaki Yamamoto

Naoki Esaka

Isao Sakai

Motoya Kanda

Takamichi Inaba

Hirotaka Hayashida

Shusuke Inada

Hiroshi Kitayama

Toru Imai

Kenichiro Yoshii

Hideaki Sato

Yutaka Yamada

Masaya Tarui

Haruhiko Toyama

Takayuki Miyazawa

Toshibumi Seki

Yasuhiro Kimura

Hiroshi Murayama

Tatsuoki Kono

Takao Sawa

Daisuke Murakami

Tatsuoki Kohno

Munehiro Yoshikawa

Kazuyuki Ikeda

Fumiyuki Kawashima

Daisuke Kawaguchi

Toshihiko Shimokawa

Yoichi Toriumi

Nobuo Sakiyama

Shirou Takeno

Jin Sato

Satoru Maeda

Kazuyoshi Horie

Hideo Segawa

Kuninori Shino

Hiroko Fujii

Manabu Onishi

Kei Yamashita

Kenichi Sakusabe

Takashi Norizuki

Naoki Sawai

Satoshi Takahashi

Tetsuya Ishikawa

Atsushi Fukumoto

Tetsuro Kimura

Toshio Okamoto

Tatsuo Inoue

Hiroyuki Hasebe

Toshinari Takahashi

Yoshiyuki Kunito

Satoshi Ueda

Katsumi Uesaka

Mitsuaki Nishie

Hideaki Hirayama

Isao Matsumoto

Takayuki Mogi

Ken-ichi Kanno

Takao Terao

Shinji Tsuruta

Kenichi Ookubo

Shiro Takeno

Kenichi Mizoguchi

Michihiko Sakurai

Kiyoshi Ishitsuka

Youichi Toriumi

Yuuichi Koba

Kazunori Kusama

Ken Komiyama

Hidekazu Oppata

Rolf Helle

Sumihiro Ookawa

Keniti Ookubo

Kenji Kibayashi

Hiroku Fujii

Sung Ho Shin

Teruyoshi Zemmyo

Akira Sato

A wall thinning detection system includes a polarized magnetic charge distribution computing unit configured to compute a spatial distribution of polarized magnetic charges, which is an aggregate of a plurality of magnetic dipoles in a monitoring area, based on a magnetic field distribution in the monitoring area of a metal instrument measured by a magnetic field sensor array comprising a plurality of magnetic field sensors, and a wall thinning distribution computing unit configured to compute a wall thinning distribution in the monitoring area based on the spatial distribution of the polarized magnetic charges calculated by the polarized magnetic charge distribution computing unit.

Wall thinning detection system, wall thinning detection method and non-transitory computer readable storage medium

According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.

Memory system and method for controlling nonvolatile memory

According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.

According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.

A controller manages a plurality of block groups each including one or more blocks among a plurality of blocks provided in a non-volatile memory. The controller assigns one of the plurality of block groups to each of plurality of zones. The controller writes write data which is to be written to a first zone to a shared write buffer and writes write data which is to be written to a second zone to the shared write buffer. When a total size of the write data in the first zone stored in the shared write buffer reaches a capacity of the first zone, the controller copies the write data in the first zone stored in the shared write buffer to the first block group assigned to the first zone.

Memory system and control method

According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.

According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.

A memory system including: a nonvolatile memory; first and second decoders configured to execute first and second error correction for correcting data read from the nonvolatile memory; and a controller configured to receive a first command issued by a host device, the first command being a command that requests neither reading nor writing data from or to the nonvolatile memory and that includes information indicative of acceptable latency of error correction, in response to receiving the first command, select one of the first decoder and the second decoder based on the received first command, and after receiving the first command, output data read from the nonvolatile memory through the selected one of the first decoder and the second decoder to the host device.

Memory system, host device and information processing system for error correction processing

According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writing the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.

System and method of writing to nonvolatile memory using write buffers

A memory system includes a nonvolatile memory including memory dies, and a controller. The controller is configured to create a first virtual storage with a first part of the memory dies and a second virtual storage with a second part of the memory dies, and create a redundant logical domain spanning one or more memory dies corresponding to the first virtual storage and one or more memory dies corresponding to the second virtual storage. The memory controller is configured to, in response to a write command, store write data corresponding to the write command in a first region of the first virtual storage and in a second region of the second virtual storage, and return to the host a response including a first physical address of the first region and a second physical address of the second region.

Memory system supporting redundant logical domain

According to one embodiment, a memory system receives, from a host, a write request including a first identifier associated with one write destination block and storage location information indicating a location in a write buffer on a memory of the host in which first data to be written is stored. When the first data is to be written to a nonvolatile memory, the memory system obtains the first data from the write buffer by transmitting a transfer request including the storage location information to the host, transfers the first data to the nonvolatile memory, and writes the first data to the one write destination block.

According to one embodiment, a storage system includes a first storage including first nonvolatile memories storing data which is corrupted when data is read from the first nonvolatile memories, and a controller which controls the first storage. The controller reads data from a first nonvolatile memory at a first address, and determines that whether the read data is to be written back to the first storage or not.

Storage system

Growing community of inventors

Yokohama Kanagawa, Japan

Hideki Yoshida