Kawasaki Steel Corporation

The Texas A&M University System

Hideki Yoneda

Edgar Sanchez-Sinencio

The invention provides a pattern recognition processing apparatus and a technique for realizing a neural network of a complex structure within the processing apparatus. The apparatus includes a neural network having two-dimensional layers connected to form a feed-forward systolic array. Each two dimensional layer includes a feature extraction layer connected with a positional error absorbing layer. A host system provides inputs to the network. Each layer within the network includes processing elements such as a MOS analog circuit that receives input voltage signals and provides output voltage signals.

Neural network processor including systolic array of two-dimensional

Neural network, processor, and pattern recognition apparatus

A memory module implementing a desired memory capacity by use of a plurality of memory chips. The memory module has a fault bit substituting device that compensates for fault bits detected in any of the memory chips. This improves the yield of the memory module and lowers the production costs thereof without recourse to expensive equipment such as wafer processors.

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Tokyo, Japan

Hideki Yoneda