Kabushiki Kaisha Toshiba

Semiconductor Technology Academic Research Center

Other

Kahishiki Kaisha Toshiba

Hideki Shibata

Noriaki Matsunaga

Takamasa Usui

Yoshiaki Sugizaki

Masayuki Ishikawa

Akihiro Kojima

Hideo Tamura

Tetsuro Komatsu

Masaki Yamada

Katsuya Okumura

Hisashi Kaneko

Nobuo Hayasaka

Yoshiaki Shimooka

Kazuyuki Higashi

Tadashi Matsuno

Minakshisundaran Balasubramanian Anand

Atsuko Sakata

Junichi Wada

Masahiko Hasunuma

Hideshi Miyajima

Tomio Katata

Hayato Nasu

Junichi Koike

Akihiro Kajita

Noriyoshi Shimizu

Makoto Wada

Kazuhiro Tomioka

Masaki Yoshimaru

Shingo Takahashi

Satoshi Nishikawa

Naofumi Nakamura

Tetsuo Matsuda

Tadashi Iijima

Kazumichi Tsumura

Masahiro Inohara

Naoki Ikeda

Tamao Takase

Rempei Nakata

Hisayo S Momose

Kazuya Ohuchi

Hiroshi Momose

Tsuyoshi Haga

Kazuhiko Hashimoto

Hiroshi Nozawa

Motonobu Kawai

Tadashi Murofushi

Masakazu Jimbo

Hiroshi Hirayama

Mitsuchika Saitoh

According to one embodiment, a semiconductor light emitting device includes a light emitting chip and a fluorescent material layer. The light emitting chip includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a resin layer. The semiconductor layer includes a light emitting layer, a first major surface, and a second major surface formed on a side opposite to the first major surface. The fluorescent material layer is provided on the first major surface and has a larger planer size than the light emitting chip.

Semiconductor light emitting device and method for manufacturing same

A method for manufacturing a light emitting device includes forming a multilayer body including a light emitting layer so that a first surface thereof is adjacent to a first surface side of a translucent substrate. A dielectric film on a second surface side opposite to the first surface of the multilayer body is formed having first and second openings on a p-side electrode and an n-side electrode. A seed metal on the dielectric film and an exposed surface of the first and second openings form a p-side metal interconnect layer and an n-side metal interconnect layer separating the seed metal into a p-side seed metal and an n-side seed metal by removing a part of the seed metal. A resin is formed in a space from which the seed metal is removed.

Light emitting device and method for manufacturing same

According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, an insulating film, a first interconnection, a second interconnection, a first metal pillar, a second metal pillar, a resin, and a fluorescent layer. The semiconductor layer has a first major surface, a second major surface formed on an opposite side to the first major surface, and a light emitting layer. The first electrode and the second electrode are provided on the second major surface of the semiconductor layer. The fluorescent layer faces to the first major surface of the semiconductor layer and includes a plurality of kinds of fluorescent materials having different peak wavelengths of emission light.

According to one embodiment, a light emitting device includes a light emitting chip, an external terminal made of a metal material, and a circuit board. The light emitting chip is mounted on the circuit board via the external terminal. The light emitting chip includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnection layer, a second interconnection layer, a first metal pillar, a second metal pillar and a resin layer. The circuit board includes an interconnection bonded to the first metal pillar and the second metal pillar via the external terminal, and a heat radiation material provided on an opposite side of the interconnection and connected to the interconnection.

Light emitting device

According to one embodiment, a light emitting device includes a stacked body, a p-side and n-side electrodes, an insulating film, a p-side extraction electrode, an n-side extraction electrode, a resin layer and a phosphor layer. The stacked body has a first and a second surface opposite to each other and includes a light emitting layer. A p-side and an n-side electrode are provided on the second surface. An insulating film has openings to which the p-side and n-side electrodes are exposed. A p-side extraction electrode includes a p-side seed metal and a p-side metal wiring layer. An n-side extraction electrode includes an n-side seed metal and an n-side metal wiring layer. A resin layer is filled around the p-side and n-side extraction electrodes, and a phosphor layer is provided on a side of the first surface. Emission light from the light emitting layer is emitted through the first surface.

Method for manufacturing light emitting device and light emitting device

According to one embodiment, a semiconductor light emitting device includes a plurality of semiconductor layers, a first electrode, a second electrode, an insulating layer, a first interconnection layer, a second interconnection layer, a first metal pillar, a second metal pillar and a resin layer, and is mounted in a bent state on a curved surface. The plurality of semiconductor layers includes a first main surface, a second main surface opposite to the first main surface, and a light emitting layer, the plurality of semiconductor layers being separated from one another. A material is provided between the plurality of the semiconductor layers separated from one another. The member has a higher flexibility than the semiconductor layers being.

Semiconductor light emitting device

There is disclosed a semiconductor device comprising a first metal wiring buried in a first wiring groove formed, via a first barrier metal, in a first insulating layer formed on a semiconductor substrate, a second insulating layer formed on the first metal wiring, a via plug formed of a metal buried, via a second barrier metal, in a via hole formed in the second insulating layer, a third insulating layer formed on the second insulating layer in which the via plug is buried, and a second metal wiring buried in a second wiring groove formed in the third insulating layer via a third barrier metal having a layer thickness of layer quality different from that of the second barrier metal.

Semiconductor device and manufacturing method thereof

A method of manufacturing a semiconductor device, including forming an opening in an interlevel insulating film disposed on a semiconductor substrate, forming an auxiliary film containing a predetermined metal element, to cover an inner surface of the opening, forming a main film to fill the opening after forming the auxiliary film, the main film containing, as a main component, Cu used as a material of an interconnection main layer, and performing a heat treatment before or after forming the main film, thereby diffusing the predetermined metal element of the auxiliary film onto a surface of the interlevel insulating film facing the auxiliary film, so as to form a barrier film on the interlevel insulating film within the opening, the barrier film containing, as a main component, a compound of the predetermined metal element with a component element of the interlevel insulating film.

Semiconductor device with a barrier film

A method for manufacturing a light emitting device includes: forming a multilayer body including a light emitting layer so that a first surface thereof is adjacent to a first surface side of a translucent substrate; forming a dielectric film on a second surface side opposite to the first surface of the multilayer body, the dielectric film having a first and second openings on a p-side electrode and an n-side electrode provided on the second surface; forming a seed metal on the dielectric film and an exposed surface of the first and second openings; forming a p-side metal interconnect layer and an n-side metal interconnect layer on the seed metal; separating the seed metal into a p-side seed metal and an n-side seed metal by removing a part of the seed metal, which is provided between the p-side metal interconnect layer and the n-side metal interconnect layer; and forming a resin in a space from which the seed metal is removed.

A method of producing a semiconductor device having a plurality of wiring layers forms a first interlayer-insulating film, forms a plurality of grooves for wiring in the first interlayer-insulating film, fills metallic films in the grooves to form wirings, etches the first interlayer-insulating film with the wirings as a mask and removes the interlayer-insulating film between the wirings to provide grooves to be filled, and fills a second interlayer-insulating film made of a material of low dielectric constant in the grooves to be filled.

Semiconductor device having multiple wiring layers and method of producing the same

A semiconductor device includes a first aerial wiring including a first wiring layer which is formed in an air gap and contains Cu as a main component and a via layer which is electrically connected to the first wiring layer, is formed in an inter-level insulating film containing a preset constituent element and contains Cu as a main component, and a first porous film formed on the first aerial wiring. The semiconductor device further includes a first barrier film which is formed to cover the surface of the first aerial wiring and contains a compound of the preset constituent element and a preset metal element as a main component.

Semiconductor device having aerial wiring and manufacturing method thereof

The semiconductor device includes a semiconductor substrate, and a multi-layer wiring portion including insulating layers and wiring layers alternately stacked one on another on a main surface of the semiconductor substrate. All of the wiring layers are made of a same basis metal, at least one of the wiring layers contains an additive element, and a concentration of the additive element is lower on an upper layer side than that on a lower layer side.

Semiconductor device including multi-layered interconnection and method of manufacturing the device

Growing community of inventors

Yokohama, Japan

Hideki Shibata