Hitachi, Ltd.

Hitachi Process Computer Engineering, Inc.

Hitachi Process Engineering, Inc.

Hideki Sato

Hiroshi Kobayashi

Keiichi Sannomiya

Toshimasa Saika

Teruyasu Nakahashi

Hiroaki Nakanishi

Masayuki Tanji

Hiroyuki Hori

Yasushi Kobayashi

Kouji Kobayashi

Atsushi Matsuno

Shigeru Endo

Masanori Naito

Mari Shigematsu

Shuji Nishiyama

Tomohito Ebina

Kazuma Nakao

Shimako Tanno

Hajime Fujimoto

Shigeaki Wada

Masanori Horie

A computer system is so configured as to be divided into a control system which should have high reliability and high responsiveness and an information system which does not access the control system. They are connected via a transmission path (transmission path of control system and transmission path of information system). Centralized management of development and maintenance is performed from a software maintenance system. In development and maintenance of software, management according to the feature of each software such as processing contents of each software, demanded reliability, and version up frequency is performed from a maintenance system for exclusive use by using a transmission path of information system. Thereby, development and maintenance having high reliability and expandability is realized.

System for software update in manner based on processing properties of

An information processing system capable of performance measurement by the use of a small amount of mounted hardware. The information processing system having central processors installed therein comprises a control circuit, and a performance measurement validation register for specifying whether a performance measurement function is valid or invalid. In a case where the validity of the measurement function has been specified by the register, the control circuit operates one loop in a duplex configuration as a performance measurement facility. At this time, counter #1-counter #3 are used as counters for totalizing performance information. On the other hand, in a case where the invalidity of the measurement function has been specified, both loops in the duplex configuration are operated as the central processors. At this time, the counter #1-the counter #3 are used as timer counters for controlling buses.

Information processing system having performance measurement capabilities

A computer system and monitoring method for efficiently monitoring a plurality of computers interconnected within a network. In this computer network system, each computer has a self-monitoring unit for monitoring its own computer and acquiring a monitor message, and a transmitting unit for transmitting the monitor message to a monitoring computer. Monitor messages transmitted from a plurality of computers are received by the monitoring computer. The monitoring computer has a receiving unit for receiving monitor messages, and a displaying unit for outputting monitor messages to a display. The receiving unit, displaying unit, and display windows on the display are provided for each of a plurality of computers to be monitored.

Computer system and monitoring method

Growing community of inventors

Katsuta, Japan

Hideki Sato