Shin-Etsu Handotai Co., Ltd.

Hideki Sato

Tsuyoshi Ohtsuki

Masaro Tamatsuka

Masahiro Kato

Akihiro Kimura

Ryuji Kono

A method of polishing a silicon wafer, including performing a mirror polishing process on the silicon wafer, the mirror polishing process including: performing rough polishing on the silicon wafer; subsequently removing metallic impurities attached on a surface of the silicon wafer by performing both an oxidation process with ozone gas or ozone water and an oxide-film removing process with hydrofluoric acid vapor or hydrofluoric acid solution on the surface of the silicon wafer; and then performing final polishing. The invention provides a method of polishing a silicon wafer and a method of producing an epitaxial wafer that can prevent the occurrence of PID in the silicon wafer due to a mirror-polishing process and the degradation of surface quality of the silicon wafer after the mirror-polishing process and the epitaxial wafer having an epitaxial layer stacked thereon in a subsequent process.

Method of polishing silicon wafer and method of producing epitaxial wafer

A method for evaluating crystal defects of a silicon wafer comprising: etching a surface of the silicon wafer by immersing the wafer in an etching solution; and observing etch pits formed on the etched surface of the wafer, wherein the silicon wafer of which crystal defects are evaluated has low electrical resistivity of 1 &#x3a9;&#xb7;cm or less, and the etching solution is a mixture of hydrofluoric acid, nitric acid, acetic acid and water further including iodine or iodide, in which a volume ratio of nitric acid in the etching solution is the largest among volume ratios of hydrofluoric acid, nitric acid, acetic acid and water, and the etching solution is adjusted to have an etching rate of 100 nm/min or less for the silicon wafer. Thereby, there is provided a method for evaluating crystal defects of a silicon wafer with low electrical resistivity by using a chromium-free etching solution without toxic chromium with high capability of detecting defects.

Method for evaluating crystal defects of silicon wafer

The present invention is a method for evaluating a semiconductor wafer by measuring an electric characteristic of the semiconductor wafer by using a mercury electrode, wherein when the semiconductor wafer is held on a wafer chuck that the mercury electrode is formed in a holding surface of so that a side of a surface to be measured of the semiconductor wafer is set to a side of the wafer chuck, the semiconductor wafer is held on the wafer chuck whose diameter forming an outermost periphery of the holding surface is smaller than a diameter forming an outermost periphery of the surface to be measured of the semiconductor wafer, and then, the electric characteristic is measured by contacting the mercury electrode with the surface to be measured of the wafer, and an evaluation apparatus. Thereby, there can be provided an evaluation method and an evaluation apparatus for a semiconductor wafer by which when the semiconductor wafer is evaluated by measuring an electric characteristic thereof by using a mercury electrode, the semiconductor wafer can be high-precisely and effectively evaluated by setting a size of a holding surface of a wafer chuck to be smaller than that of a surface to be measured of the semiconductor wafer that is an object to be measured.

Method for evaluating semiconductor wafer and apparatus for evaluating semiconductor wafer

An apparatus for evaluating an electric characteristic of a semiconductor wafer including, at least, a wafer cassette section on which a wafer cassette for storing the semiconductor wafer that is an object to be evaluated is placed, a wafer pretreatment section for pretreating the semiconductor wafer in order to evaluate the electric characteristic thereof, a mercury probe section for evaluating the electric characteristic of the semiconductor wafer by using a mercury probe, and an automatic transport part for transporting the semiconductor wafer to each of the sections.

Apparatus for evaluating semiconductor wafer

There are provided a silicon wafer for epitaxial growth wherein a void type defect is not exposed on the surface where an epitaxial layer is grown, and a method for producing an epitaxial wafer comprising measuring the number of the void type defects exposed on the surface of a silicon wafer and/or the number of the void type defects which exist in the part to the depth of at least 10 nm from the surface of the silicon wafer, choosing the silicon wafer wherein the number of these void type defects is smaller than the predetermined value, and growing an epitaxial layer on the surface of the chosen silicon wafer. Thereby, there can be provided a silicon wafer for epitaxial growth wherein generation of SF is reduced and epitaxial wafer, and a method for producing it.

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Gunma, Japan

Hideki Sato