Brillnics Singapore Pte. Ltd.

The Ritsumeikan Trust

Hideki Owada

Ken Miyauchi

Isao Takayanagi

Kazuya Mori

Sangman Han

Masayuki Uno

Shunsuke Okura

Rimon Ikeno

Ai Otani

Kazuki Tatsuta

Ryotaro Hotta

In a pixel signal processing part, a first input switch and an output switch are turned on and off in phase. When the first input switch and the output switch are ON and the second input switch is OFF, a first auto-zero switch and a second auto-zero switch are kept in the ON state to connect the second node to the reference potential (GND), so that a sampling capacitor, a feedback capacitor, and an auto-zero capacitor are operated in respective operation ranges of the capacitors, and the feedback capacitor is kept constant according to a difference of the input pixel signals, thereby making the output of the amplifier in linear response to the input signal.

Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus

Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus that are capable of selecting a pixel operating mode between a RS mode and a GS mode and switching a conversion gain read-out mode, where signals produced with different conversion gains are read, among several options depending on a scene. As a result, the solid-state imaging device, the method for driving the solid-state imaging device and the electronic apparatus can minimize a drop in SNR at the conjunction point between a HCG signal and a LCG signal and also achieve high full well capacity and little dark noise. In a solid-state imaging device, a pixel part includes pixels arranged in a matrix pattern, and each pixel includes a photoelectric conversion reading part. The solid-state imaging device is capable of performing rolling shutter (RS) and global shutter (GS).

A solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus are capable of reducing kTC noise of a LCG signal, preventing a drop in SNR at the conjunction point between a HCG signal and the LCG signal, and eventually achieving improved image quality. At a start of a reset period, first and second reset transistors are switched into a conduction state. During a predetermined first period after the reset period starts, the first reset line is kept connected to a reset potential. After the first period elapses, the second reset transistor is switched into a non-conduction state to switch the first reset line into a floating state, so that the first reset line has high impedance. After a second period elapses and when the reset period ends, the first reset transistor is switched into the non-conduction state.

Some embodiments relate to an imaging system including an active pixel a comparator, a write control circuit, and an analog-to-digital conversion (ADC) memory. The active pixel may include a photodiode and a plurality of transistors. The comparator may be operative coupled to the active pixel and configured to receive an output of the active pixel. The write control circuit may be operative coupled to the comparator and configured to receive an output from the comparator. The ADC memory may be operatively coupled to the write control circuit. A data structure may be stored in the ADC memory, and may be configured to store at least a first data string, which may include a set of flag bits for identifying each ADC operation performed and a set of ADC data bits.

System, method, device and data structure for digital pixel sensors

Some embodiments relate to an imaging system including an active pixel and an analog-to-digital conversion (ADC) circuit including comparator. The comparator may be operatively coupled to the active pixel and configured to receive an output of the active pixel. The back-end ADC and memory circuit may be operatively coupled to the active pixel. The back-end ADC and memory circuit may include a write control circuit, an ADC memory operatively coupled to a read/write data bus and to the write control circuit, and a state latch operatively coupled to the write control circuit.

Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions. A pixel signal processing partincludes a first reading partand a second reading part. Of a pixel signal PIXOUT input into an input node ND, the first reading partinverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting partvia a connection node ND. Of the pixel signal PIXOUT input into the input node ND, the second reading partkeeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting partvia the connection node ND

A photoelectric conversion reading part of a pixel includes a photoelectric conversion element for storing therein, in a storing period, charges generated by the photoelectric conversion, a transfer element for transferring, in a transfer period following the storing period, the charges stored in the photoelectric conversion element, an output node to which the charges stored in the photoelectric conversion element are transferred through the transfer element, a reset element for resetting, in a reset period, the output node to a predetermined potential, an output buffer part for converting the charges in the output node into a voltage signal at a level determined by the amount of the charges and outputting the voltage signal as the pixel signal, and an output voltage control part for controlling an output signal level of the pixel signal from the output buffer part to a controlled level determined by the operational state.

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Tokyo, Japan

Hideki Owada