Fujitsu Corporation

Hideki Noto

Takuya Watanabe

Tetsuya Kida

Hiroyuki Yaegashi

A thin film transistor wherein at least one of (1) a gate electrode and/or a scanning line therefor and (2) source/drain electrode and/or signal lines therefor comprises a laminated wiring structure in which a main wiring layer formed of a metal selected from Al and Cu or an alloy based on the metal is sandwiched between an underlying wiring layer and an overlaying wiring layer, the underlying and overlaying wiring layers being formed of a material based on a metal or alloy of metals and containing nitrogen, the metal being selected from Ti, Mo, W, Cr, Al and Cu, and the materials used in the underlying and overlaying wiring layers being different from each other. Alternatively, the underlying and overlaying wiring layers are formed of a material based on the same metal or alloy of metals and containing nitrogen, the metal being selected from Ti, Mo, W, Cr, Al and Cu, and contents of nitrogen in the underlying and overlaying wiring layers being different from each other. A method of manufacturing such a thin film transistor is also disclosed.

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Yonago, Japan

Hideki Noto