Nec Corporation

Sony Corporation

Hideki Kobunaya

Yutaka Ishikawa

Takayoshi Chiba

Yoshimori Yamasaki

A communication controller transfers data cells and a control data cell representative of a target transmission rate from a system memory to a host; however, when a bus between the system memory and the communication controller is congested, the actual transmission rate for the data cells becomes smaller than the target transmission rate; a time stamp generator produces a time stamp representative of time for requesting a data transfer from the system memory, and a time stamp monitor compares the time stamp with actual stating time of transmission of the data cell to the host so as to check whether the target transmission rate is appropriate or not; if the target transmission rate is too large, the time stamp monitor requests a data processor to change the target transmission rate so that the data cells are transferred to the host at an appropriate transmission rate at all times.

Communication system with time stamp controller for regulating

A communication data receiver comprises a counter for generating a write address on a buffer memory for communication cell data according to a write signal directing the communication cell data to be written into the buffer memory, a latch circuit for holding a write address for start communication cell data being written, an overflow detection circuit for detecting an overflow of the buffer memory, a circuit for prohibiting communication cell data from being written into the buffer memory according to an overflow detection signal, and a circuit for setting a write address held in the latch circuit as a writing start address for the next received communication cell data in the counter according to the overflow detection signal.

Communication data receiver capable of minimizing the discarding of

In an optical information accessing system for an optical disc including a plurality of tracks forming one helix, a counter counts sectors, and a comparator compares a value of the counter with a predetermined value. When the value of the counter reaches the predetermined value, a coincidence signal is generated from the comparator. A gate circuit passes the coincidence signal as a jump-back signal. When data processing upon the optical disc is abnormally interrupted and the coincidence signal is generated, the predetermined value is switched from a first value to a second value larger than the first value.

Optical information accessing system capable of reliable jump-back

An optical information control device and synchronizing method therefor include a mark detection circuit for detecting marks recorded at even intervals in a track on an optical disk and outputting a mark detection signal indicating a detected mark; a frequency dividing circuit for generating a reference clock by frequency-dividing a pit clock and stopping an operation thereof when having received the mark detection signal; and a resumption circuit for resuming the frequency dividing circuit after a preset time from reception of the mark detection signal. Moreover, the reference clock may be synchronized to a byte boundary of data recorded on the optical disk by stopping generation of the reference clock for a preset time.

Optical information control device and synchronizing method thereof

An optical information control device and synchronizing method therefor include a mark detection circuit for detecting marks recorded at even intervals in a track on an optical disk and outputting a mark detection signal indicating a detected mark; a frequency dividing circuit for generating a reference clock by frequency-dividing a pit clock and stopping an operation thereof when having received the mark detection signal; and a resumption circuit for resuming the frequency dividing circuit after a preset time from reception of the mark detection signal. Moreover, the reference clock, may be synchronized to a byte boundary of data recorded on the optical disk by stopping generation of the reference clock for a preset time.

In an optical information accessing system for an optical disk including a plurality of sectors each having sector mark, a read operation is carried out by a sector mark detection signal when this signal is generated, and is carried out by a sector mark interpolation signal when the sector mark detection signal is not generated. When the sector mark detection signal is generated, the sector mark interpolation signal is masked, while, when the sector mark interpolation signal is not masked, the sector mark detection signal is invalidated.

Optical information accessing system capable of generating one sector

A disc drive such as an optical magnetic disc drive latches status information IDS, and IDOST to DATST for operational status at a timing when an abnormality occurs, and repeats recording based upon latched status information IDS, and ID0ST to DATST, thereby reducing retry time.

Data recording apparatus

In a disc reproduction apparatus 1 for reproducing information signals from a disc recording medium whereon a first synchronization pattern is formed on a recording track in predetermined cycles and more than one second synchronization pattern with fewer bits than the first synchronization pattern which has been recorded between first synchronization patterns adjacent to each other, second synchronization patterns are detected without fail and highly accurately. The timing of a second synchronization pattern detecting means 7 for fetching the reproduction signal R is made variable through making the window width of window signal WIN variable based on the results (F1 and F2) of the detection of first and second synchronization patterns by first and second synchronization pattern detecting means 6 and 7.

Disc reproduction apparatus

In an optical disk apparatus, a circuit for counting the number of tracks crossed by an optical head comprises a first storage means for storing a sampling value obtained for each predetermined sampling cycle, a second storage means for storing a sampling value obtained for the immediately preceding sampling cycle and a comparator means for comparing the first and second values each stored within said first and second storage means. If the value obtained by this comparator means is smaller than a predetermined value, then the first value is selected as the count of the number of crossed tracks, and if the opposite is the case, then the second value is selected as such.

Circuit for counting the number of crossed over tracks by an optical

A product adder includes a data input memory, a multiplier, a shifter, a full adder, an accumulator, and a normalizing circuit. The memory stores two floating-point data. The multiplier performs multiplication of the floating-point data stored in the memory. The shifter converts the product of the multiplier into fixed-point data. The full adder performs cumulative addition of the fixed-point data output from the shifter. The accumulator holds output data from the full adder. The normalizing circuit converts the output data from the accumulator into floating-point data and outputting the converted data.

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Tokyo, Japan

Hideki Kobunaya