Mitsubishi Chemical Corporation

Hideki Kiritani

Yasuhiro Kawase

Makoto Ikemoto

Masanori Yamazaki

Mari Abe

Tomohide Murase

Yasunori Matsushita

Masaya Sugiyama

Yasunori Matshushita

To provide a composition for a three-dimensional integrated circuit capable of forming a filling interlayer excellent in thermal conductivity also in a thickness direction, using agglomerated boron nitride particles excellent in the isotropy of thermal conductivity, disintegration resistance and kneading property with a resin. A composition for a three-dimensional integrated circuit, comprising agglomerated boron nitride particles which have a specific surface area of at least 10 m/g, the surface of which is constituted by boron nitride primary particles having an average particle size of at least 0.05 &#x3bc;m and at most 1 &#x3bc;m, and which are spherical, and a resin (A) having a melt viscosity at 120&#xb0; C. of at most 100 Pa&#xb7;s.

Agglomerated boron nitride particles, composition containing said particles, and three- dimensional integrated circuit having layer comprising said composition

To provide a composition which satisfies a high K1c value, a high glass transition temperature and a low viscosity simultaneously, and which is capable of forming an interlayer filler layer for a layered semiconductor device of which stable bonding is maintained even regardless of changes of environment. A composition comprising an epoxy compound (A) having a viscosity at 25&#xb0; C. of at most 50 Pa&#xb7;s, an amine compound (B) having a melting point or softening point of at least 80&#xb0; C., and an amine compound (C) having a melting point or softening point of less than 80&#xb0; C., wherein the proportion of the amine compound (C) is at least 1 part by weight and less than 40 parts by weight per 100 parts by weight of the total amount of the amine compound (B) and the amine compound (C).

Composition for interlayer filler of layered semiconductor device, layered semiconductor device, and process for producing layered semiconductor device

To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property. A three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(m&#xb7;K) between the semiconductor substrate.

Three-dimensional integrated circuit laminate, and interlayer filler for three-dimensional integrated circuit laminate

Agglomerated boron nitride particles, composition containing said particles, and three-dimensional integrated circuit having layer comprising said composition

To provide a three-dimensional integrated circuit laminate filled in with an interlayer filler composition having both high thermal conductivity and low linear expansion property, a three-dimensional integrated circuit laminate, which comprises a semiconductor substrate laminate having at least two semiconductor substrates each having a semiconductor device layer formed thereon laminated, and has a first interlayer filler layer containing a resin (A) and an organic filler (B) and having a thermal conductivity of at least 0.8 W/(rrrK) between the semiconductor substrate.

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Chiyoda-ku, Japan

Hideki Kiritani