Casio Computer Co., Ltd.

Oki Electric Industry Co., Ltd.

Hideki Kamada

Yoshihiro Kawamura

Tsutomu Nomoto

Junji Shiota

Ichiro Ohno

Ichiro Kohno

Satoshi Kanemitsu

A printer head substrate having a silicon substrate on which heat generating elements and partitions are formed and an orifice plate which adhered to the partitions is placed on a stage of a helicon-wave dry etching system. Helicon-wave dry etching is performed while cooling the printer head substrate by allowing a coolant gas to be intervened between the substrate and the stage. This allows multiple orifices of a desired and adequate shape to be simultaneously and quickly bored in the orifice plate even if a thin film sheet having adhesive layers adhered to both sides thereof is used as the orifice plate, thereby improving the working efficiency.

Method of manufacturing ink-jet printer head

Each of heating elements comprises a heating resistor, and a pair of a common electrode and an individual electrode formed on ends of said heating resistor so that a heating area of the heating resistor is exposed. A barrier layer covers the electrodes so that the electrodes are not exposed to the ink in the ink flow passage, that is, not only upper surface of the electrodes, but also edges thereof are covered with the barrier layer. The barrier layer is made of, for example, single atomic metal such as Ta and Ti, oxide, corrosion resistant amorphous alloy, titanium nitride, titanium-tungsten, or the like. The barrier layer has the thickness of 10 to 1,000 nm, and is made by electroless plating or the like. The barrier layer is effective in preventing not only corrosion but also migration as contact surface corrosion.

Ink-jet printer head and manufacturing method thereof

A plurality of address wiring layers and a plurality of data wiring layers are arranged to cross each other at a right angle. TFTs are respectively arranged at the intersections between the address wiring layers and the data wiring layers. The gate electrode of each TFT is connected to an address wiring layer for each row. The drain electrode of each TFT is connected to a data wiring layer for each column. Display electrodes are respectively arranged in the regions defined by the address wiring layers and the data wiring layers, and are connected to the source electrodes of the TFTs arranged in the respective regions. The data wiring layers and the source and drain electrodes of the TFTs each comprise the first layer serving as an ohmic barrier layer for a semiconductor layer, the second layer forming of a conductive material and serving as a main signal wiring layer, and the third layer serving as a battery reaction preventing layer.

LCD TFT drain and source electrodes having ohmic barrier, primary

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Tokyo, Japan

Hideki Kamada