Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Panasonic Corporation

Panasonic Automotive Systems Co., Ltd.

Hideki Iwaki

Yutaka Taguchi

Tetsuyoshi Ogura

Tetsuyosi Ogura

Yoshihiro Bessho

Naoki Komatsu

Hiroyoshi Tagi

Takeshi Nakayama

Keiji Onishi

Toru Yamada

Kazuo Eda

Yasuhiro Sugaya

Toshiyuki Asahi

Osamu Kawasaki

Ryosuke Shiozaki

Tousaku Nishiyama

Shun-ichi Seki

Tsukasa Shiraishi

Hideki Watanabe

Yoshinobu Idogawa

Koichi Hirano

Shinya Saito

Yoshiyuki Saito

Eiji Takahashi

Shingo Komatsu

Yukihiro Ishimaru

Yukihiro Fukumoto

Eiichi Sadayuki

Tomohiro Kinoshita

Yutaka Kumano

Yuto Suzuki

Mima Furukawa

Kenjiro Kumazawa

Tomoaki Furuse

Chie Yamamoto

Yukinobu Furukawa

A cutoff device includes a conductor wire, a pyrotechnic circuit breaker, a plurality of drive circuits connected to the pyrotechnic circuit breaker in parallel and configured to activate the pyrotechnic circuit breaker, and a control circuit. The control circuit sets an output current value and a period for which the output current is output to each of the drive circuits, and causes the drive circuits to supply the power for activating the pyrotechnic circuit breaker when the pyrotechnic circuit breaker needs to be activated.

Interruption device

A protection system includes: a first positive terminal; a second positive terminal; a first relay configured to be opened and closed by contact and separation of a first contact portion and a second contact portion; and a fuse. The first relay and the fuse are connected in series between the first positive terminal and the second positive terminal, and when an electric current exceeding a threshold current flows to the first relay, the first contact portion and the second contact portion are separated in the first relay at a first time, and when the first contact portion and the second contact portion are separated, an arc discharge occurs between the first contact portion and the second contact portion, an arc discharge occurs between the first electrode and the second electrode of the fuse at a second time, the arc discharge occurs at both of the first relay and the fuse and a difference in potential between the first electrode and the second electrode of the fuse increases during a period between the second time and a third time, and the first positive terminal and the second positive terminal are disconnected at a fourth time.

Protection system

A circuit board includes: a substrate; a first power feed line disposed so as to be close to a plurality of radiating elements provided on a surface of the substrate and to extend in a first direction; a first connection conductor extending in a second direction orthogonal to the first direction, one end of the first connection conductor being connected to the first power feed line substantially at its central portion in the first direction; and a second power feed line that has a first line part extending in a third direction orthogonal to the second direction, the first line part joining to another end of the first connection conductor, and also has a second line part branching from the first line part, the second line part joining to the other end from a third direction side.

Circuit board

An antenna module includes a multilayer board, a phased array antenna that includes antenna elements arranged on an outer face of a second conductor layer included in the multilayer board and adjusts one or more beam directions of the antenna elements, a radio frequency (RF) chip that is arranged on an outer face of first conductor layers included in the multilayer board and outputs the radio frequency signal, a matching circuit that is arranged on the outer face of the first conductor layers and adjusts matching between impedance of the antenna elements and impedance of the RF chip, a through hole that couples the first conductor layers and the second conductor layer, and one or more vias that are on an outer side in a diameter direction of the through hole and couples the first conductor layers.

Antenna module

An antenna device comprises a dielectric substrate that has first and second surfaces; first and second antenna elements that are arranged on the first surface of the dielectric substrate; a ground conductor that is arranged on the second surface of the dielectric substrate; and an electromagnetic band gap structure that is arranged between the first and second antenna elements on the dielectric substrate. The electromagnetic band gap structure comprises: a plurality of patch conductors that are arranged on the first surface of the dielectric substrate and are electromagnetically coupled with the ground conductor; and at least one opening that is arranged in the ground conductor to expose the dielectric substrate, and causes the electromagnetic coupling between the plurality of patch conductors and the ground conductor to change.

Antenna device using EBG structure, wireless communication device, and radar device

An antenna device of the present disclosure includes: a dielectric layer; first and second conductor layers provided on both surfaces, respectively, of the dielectric layer; first and second antenna elements provided in the first conductor layer; a grounded conductor provided in the second conductor layer; and an EBG structure provided between the first and second antenna elements, wherein the EBG structure includes a first EBG portion provided in the first conductor layer, the first EBG portion including a plurality of first patch conductors electromagnetically coupled to the grounded conductor, and a second EBG portion provided in the second conductor layer, the second EBG portion including a plurality of second patch conductors electromagnetically coupled to the grounded conductor.

Antenna device, wireless communication apparatus, and radar apparatus

An antenna device comprises a first dielectric substrate; first and second antenna elements arranged on a first surface of the first dielectric substrate; a ground conductor arranged on a second surface of the first dielectric substrate; and an EBG structure arranged between the first and second antenna elements. The EBG structure comprises first patch conductors that are each arranged in contact with the first surface of the first dielectric substrate and are each electromagnetically coupled with the ground conductor; second patch conductors that are each arranged in a prescribed distance from the first surface of the first dielectric substrate in a direction opposite to the second surface, and are each electromagnetically coupled with corresponding one of the first patch conductors; and first connection conductors that electrically connect the first patch conductors with the second patch conductors.

A pair of discretionary points on a principal surface of a block are coupled to each other with a metal wire having a length larger than a distance between the pair of discretionary points, liquid resin is applied to the principal surface so as to cover the metal wire and then cured, so that a resin-cured material is formed, and the upper-surface portion of the resin-cured material is removed together with an intermediate portion of the metal wire, and then the block is removed from the resin-cured material.

Semiconductor device and manufacturing process thereof

In a noise reduction circuit, a transistor circuit amplifies an input signal and outputs an output signal with supply of power from the DC voltage source via a power supply line circuit. The canceling signal adding circuit acquires and attenuates a part of the output signal, to generate a canceling signal having a phase substantially opposite to a phase of a leakage signal leaking to the power supply line circuit, and having an amplitude substantially the same as an amplitude of the leakage signal.

Noise reduction circuit for canceling leakage signal

An interference analysis device that analyzes interference includes an input unit that inputs design data, a selection unit that selects an analysis region, a division unit that divides a wire into segments, a calculation unit that calculates a circuit matrix regarding a coupled line, and an analysis unit that obtains a degree of electromagnetic interference, wherein the calculation unit calculates a circuit matrix of the coupled line, using a parameter set obtained by adding an asymmetry parameter to RLGC parameters of a transmission line in the coupled line. Thus, a method for analyzing an interference of circuit wiring can be provided, which is capable of shortening a processing time substantially while maintaining high precision.

Circuit wiring interference analysis device, interference analysis program, database used in interference analysis device, and asymmetrically connected line model

An interference analysis device can be provided, which analyzes interference between wirings of a circuit board with reduced load and for a short time period. The interference analysis device according to the present invention includes: a design data input part for inputting design data of the circuit board; a noise characteristics setting part that sets data representing electrical characteristics of noise for a wiring of the circuit board; a limit value setting part that sets an allowable limit value of noise received by a wiring; a selection part that selects a wiring group to be analyzed based on the noise characteristics data and the allowable limit value; an interference analysis part that calculates, concerning the selected wiring group, an amount of interference from a wiring giving the interference to a wiring receiving the interference; and a received noise level calculation part that calculates a noise level that the wiring receiving the interference will receive.

Interference analysis method, interference analysis device, interference analysis program and recording medium with interference analysis program recorded thereon

At least four terminal electrodes are provided on a surface of multi-layer substrate main body. An electric functional layer is selectively provided at an internal area of said multi-layer substrate placed at a downward position of all terminal electrodes in a substrate thickness direction. A semiconductor device is flip-chip-bonded to the terminal electrodes. Thus, the semiconductor device is electrically connected to the electric functional layer at a short distance. As a result, a reduction in parasitic inductance and an improvement in high frequency characteristic can be accomplished. Generation of height variations between the terminal electrodes can be prevented, and the semiconductor device is stably flip-chip-bonded to the multi-layer substrate.

Semiconductor module

The design system, which is equipped with capability to analyze circuit board design data, comprises a storing section for recording design data, including structure data, circuit data, and element data; a selection section for selecting a pair of circuit elements subject to interference analysis among circuit elements placed on a circuit board, represented by the structure data; a substitution section for acquiring element data concerning circuit elements selected by the selection section from the design data and, based on element data, generating equivalent circuit data representing electromagnetic coupling within the pair of circuit elements with the help of an equivalent circuit; and an analysis section for calculating an amount of interference within the pair of circuit elements by analyzing data produced by combining the equivalent circuit data with the circuit data.

Circuit board design system, design data analysis method and recording medium with analysis program recorded thereon

A stacked device is disclosed which is easily manufactured while identifying a plurality of devices that are stacked in the stacked device. The stacked device includes a stack of a plurality of slave devices and a master device having identical terminal arrangements. Here, the master device includes command transmission unit configured to input an identification command to a terminal of an adjacent slave device. Furthermore, the slave device includes a through-wire for interconnecting at least one terminal of that same device and an adjacent slave device; command reception unit configured to receive the identification command; and ID (identifier) setting unit configured to set the ID of that same device based on the identification command; the positions of the terminals that are interconnected with the adjacent slave devices differing in each slave device, so that, in each slave device, the slave device command reception unit receive an identification command having a modified value as a result of transiting through-wires that are connected at differing positions in each slave device.

Growing community of inventors

Osaka, Japan

Hideki Iwaki