Toshiba Memory Corporation

Hideki Inokuma

Osamu Matsuura

Hajime Kaneko

Masanari Fujita

Takeshi Imamura

Kenichi Fujii

Hisashi Kato

Genki Kawaguchi

Hideo Wada

Takanobu Itoh

Makoto Watanabe

Naoki Yamamoto

Masakazu Sawano

Kenta Yoshinaga

Wataru Sakamoto

Yoshihiro Yanai

Takuya Inatsuka

Takahiro Tomimatsu

Naoyuki Iida

Junichi Shibata

Masanori Fujita

According to one embodiment, it includes a stacked body including N-number of layers (N is an integer of 2 or more) stacked on a semiconductor substrate, opening portions penetrating the stacked body in a stacking direction, columnar bodies respectively disposed in the opening portions, and a slit dividing M-number of layers (M is an integer of 1 or more and (N&#x2212;2) or less) of the stacked body in a horizontal direction from above, wherein the slit is formed with lateral surfaces respectively having a spatial periodicity in a horizontal plane.

Three-dimensional semiconductor memory device including slit with lateral surfaces having periodicity

A semiconductor memory device according to an embodiment includes a substrate; a plate-like first conductivity layer provided above the substrate and extending parallel to a substrate plane to bestride first and second regions; a plate-like second conductivity layer provided above the first conductivity layer to be separated from the first conductivity layer, an end portion of the first conductivity layer has a protruding staircase shape in the first region, the second conductivity layer extending parallel to the first conductivity layer to bestride the first and second regions; a first contact connected to the first conductivity layer at a side surface or a bottom surface of the first conductivity layer and extending from the first conductivity layer toward the substrate, the first contact being connected at a position where the end portion of the first conductivity layer in the first region protrudes, and a diameter size of a portion of the first contact connected at a side surface or a bottom surface of the first conductivity layer having a maximum diameter size; a second contact connected to the second conductivity layer at a side surface or a bottom surface of the second conductivity layer in the first region and extending from the second conductivity layer toward the substrate to penetrate the first conductivity layer, a diameter size of a portion of the second contact connected at a side surface or a bottom surface of the second conductivity layer having a maximum diameter size; a channel body penetrating the first and second conductivity layers in the second region; and a memory film including a charge accumulation portion provided between the first and second conductivity layers and the channel body in the second region.

Semiconductor memory device

A semiconductor memory device includes a first member spreading along a first direction and a second direction, a stacked body provided on a third-direction side when viewed from the first member, and a second member provided inside the first member and exposed at a surface of the first member on the third-direction side. A configuration of an end portion in the first direction of the stacked body is a staircase configuration having terraces formed every conductive film. The second member is made from a material different from a material of the first member. The second member is totally disposed in a region opposing a total length of an end edge of the stacked body on the first-direction side, and not disposed in an outer region of the stacked body on the second-direction side.

According to one embodiment, a semiconductor device includes: a first stack above a substrate and including insulation layers and conductive layers alternately stacked in a first direction, the first stack including a staircase-shaped portion in an end portion of the first stack in a second direction parallel to a main face of the substrate, the staircase-shaped portion including steps and terraces corresponding to the conductive layers, at least a part of the steps having arc shape curved along a third direction crossing the second direction; and a second stack above the substrate and including first and second layers stacked in the first direction. In the second and/or third direction, a dimension of the first stack is larger than a dimension of the second stack.

Semiconductor device

A semiconductor memory device according to the embodiment includes a substrate, electrodes, at least one pillar structure, at least one charge storage film, and at least one insulating member. The electrodes are provided on the substrate, are separately stacked each other, and constitute a stacked body. The electrodes have a first width in a first direction along a surface of the substrate and include a portion extending in a second direction crossing the first direction along the surface. The pillar structure is provided in the stacked body and includes a semiconductor layer extending in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor layer and the electrodes. The insulating member has a width in the first direction smaller than the first width, pierces the electrodes, and is provided to extend in the stacking direction.

Semiconductor memory device and method for manufacturing the same

According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a pillar structure, at least one charge storage film, and a first electrode. The stacked body includes electrode films stacked separately from each other. The pillar structure is provided in the stacked body and includes a semiconductor layer extending in stacking direction of the stacked body. The charge storage film is provided between the semiconductor layer and the electrode films. The first electrode is provided in the stacked body, spreads in the stacking direction and a first direction along a surface of the substrate, and contacting the substrate. The first electrode includes a first portion containing a material having conductivity and a second portion containing a material that a linear expansion coefficient is lower than a linear expansion coefficient of silicon, and positioned at a substrate side than the first portion in the stacking direction.

A memory device includes a substrate and a stacked body arranged along a first direction. The stacked body includes electrode films. A configuration of an end portion in a second direction of the stacked body is a staircase configuration. Steps corresponding to the electrode films are formed in the staircase configuration. A first distance between a first step and an end edge of the stacked body in the second direction is shorter than a second distance between a second step and the end edge in the second direction. The first step is positioned at an end portion in a third direction of the stacked body. The second step is positioned at a central portion in the third direction of the stacked body. The first and second steps correspond to two of the electrode films positioned at the same level when counting along the first direction from the substrate side.

Memory device and method for manufacturing same

According to one embodiment, a semiconductor memory device includes first to third conductive layers extending along a first direction, and a memory portion. A portion of the second conductive layer is provided between the third conductive layer and a portion of the first conductive layer. The first conductive layer includes a first end portion crossing the first direction. The second conductive layer includes a second end portion crossing the first direction. The third conductive layer includes a third end portion crossing the first direction. A position in the first direction of a portion of the second end portion is between a position of the first end portion and a position of the third end portion. The position in the first direction of the portion of the second end portion is between a position of another portion of the second end portion and the position of the third end portion.

According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, and a plurality of columnar parts. The stacked body is provided on the substrate. The stacked body includes a plurality of electrode films stacked separately from each other. The plurality of columnar parts is provided in the stacked body. Each of the plurality of columnar parts includes a semiconductor pillar extending in a stacking direction of the stacked body, and a charge storage film provided between the semiconductor pillar and the stacked body. The plurality of electrode films includes a first electrode film provided in upper layers of the stacked body and a second electrode film provided in lower layers of the stacked body. A thickness of the first electrode film is thicker than a thickness of the second electrode film. The first electrode film is provided with a void.

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Yokkaichi, Japan

Hideki Inokuma