Canon Kabushiki Kaisha

Kabushiki Kaisya Advance Kaihatsu Kenkyujo

Hitachi, Ltd.

Hitachi Video Engineering, Incorporated

Sokkisha Co., Ltd.

Pumpkin House Incorporated

Kabushiki Kaisha Advance

Hideki Imai

Keiichi Iwamura

Minoru Sasaki

Yasunori Dohi

Nobukazu Doi

Seiichi Mita

Morishi Izumita

Akira Saito

Hiroto Yamauchi

Ryuji Kohno

Mamoru Kaneko

Tetsuya Amano

Tutomu Matumoto

Hefeng Wang

Copying machine with encryption function

A Reed-Solomon coding decoder for use in error correction has a plurality of processing elements (PEs) each including a selector having a plurality of inputs and at least one output, a multiplier which receives as at least one of the inputs thereof the output from the selector, an adder for adding the outputs of the multiplier, and m-stages of registers for storing the outputs of the adder and the selector. The PEs are connected in a predetermined pattern to realize a compact construction of a Reed-Solomon code decoder.

Apparatus for encoding and decoding reed-solomon code

A frequency diversity receiving system is based on cancellation of a C/A (Clear/Acquisition) code in a GPS (Global Positioning System). Spread spectrum signals of a P code (Precision) code is picked up by removing, in an interference removal circuit, spread spectrum signals of the C/A code out of spread spectrum signals of L.sub.1 band which are transmitted from GPS satellites. A difference in relative delay times between the spread spectrum signals of the P code in L.sub.1 band and spread spectrum signals of the P code in L.sub.2 band, which are also transmitted from GPS satellites, is obtained in a modified DLL (Delay Locked Loop).

Frequency diversity receiving system based on cancellation of C/A code

A system for generating a cryptokey (k) to be shared among entities (A, B) engaged in communications, in particular one known as the key predistribution system. Indentifiers (y.sub.A, y.sub.S) for the entities engaging in communications under a center and a center algorithm (G) which only the center knows are generated, then secret algorithms (x.sub.A, X.sub.B) distinct to each entity are generated on added to IC cards or other cipher generation means (2, 3). A cipher generation means (2, 3) is provided for each entity. The identifiers (y.sub.B, y.sub.A) of the other entity are applied to compute a cryptokey, whereby a common cryptokey is generated. Also disclosed is a system for communications using the above shared cryptokey.

Common cryptokey generation system and communication system using common

A signal processing system capable of converting various input analog signals including bioelectric signals, such as electrocardiographic signals, electro-encephlographic signals, and pulse wave signals, into digital signals by A/D converter, compressing the converted data by data compression, recording the compressed data on a compressed data recorder, regenerating the compressed data fetched from the compressed data recorder by data regeneration including a Huffman decoder, mode selector and regenerated data forming device, and then providing analog signals corresponding to the regenerated data.

Signal processing system

A device for decoding coded digital signals for every symbol consisting of a plurality of binary signals comprises first circuit for generating a first reliability for every binary signal; hard decided from the received or reproduced signal, in the symbol and second circuit for generating a second reliability for every symbol consisting of n binary signals on the basis of the first reliability, whereby decoding processing e.g. soft decision decoding is effected for every signal, depending on the second reliability.

Decoding device for digital signals

There is a signal processing apparatus for use in the error correction field for correcting errors in systems such as Reed Solomon code. This apparatus has three kinds of cells which execute the proceses in the decoding of the BCH code: namely, a syndrome cell to produce syndromes; a GCD (greatest common divisor) cell to produce an error position polynomial and an error evaluation polynomial; and an evaluation cell to estimate and correct errors in position and size. The required cells are one-dimensionally arranged in accordance with the error correcting capability of the code which is used. The algorithm for the signal processes in the conventional communication line is modified to the algorithm suitable for parallel processing. The signal processes can be executed using parallel processors due to the pipeline processes. Those dedicated cells can be realized by the hardwares, respectively. Each cell is controlled by only reference clock and synchronizing signal and the input and output data are time-sequentially multiplexed in the cell or process. Thus, this apparatus is fitted for multi-error correction and can be formed as an LSI because the circuit scale is small.

Signal processing apparatus for correcting decoding errors

In a physiological signals processing system including (a) a A/D conversion means for converting physiological signals into digital signals and (b) a data compression means for reducing the number of data points sampled from said digital signals, the improvement which comprises: said data compression means being provided with a first sampling means for sampling a pair of combined peak points from said digital signals by applying the second order differential conversion to said digital signals, and a second sampling means for sampling level points by the level detection of said digital signals in the portion where adjacent peak points are not combined.

Physiological signals processing system

Growing community of inventors

Yokohama, Japan

Hideki Imai